More cleanup, ARM9 exceptions for Luma and payloads are always enabled (FIRM ARM9 and ARM11 exceptions need Dev. options not to be "none")

This commit is contained in:
Aurora 2016-09-03 02:02:03 +02:00
parent 0b33551d94
commit d412711868
3 changed files with 32 additions and 34 deletions

View File

@ -37,13 +37,13 @@ void installArm9Handlers(void)
memcpy((void *)0x01FF8000, arm9_exceptions + 32, arm9_exceptions_size - 32);
//IRQHandler is at 0x08000000, but we won't handle it for some reasons
//svcHandler is at 0x08000010, but we won't handle svc either
/* IRQHandler is at 0x08000000, but we won't handle it for some reasons
svcHandler is at 0x08000010, but we won't handle svc either */
for(u32 i = 0; i < 4; i++)
{
*(vu32 *)(0x08000000 + offsets[i]) = 0xE51FF004;
*(vu32 *)(0x08000000 + offsets[i] + 4) = *((const u32 *)arm9_exceptions + 1 + i);
*(vu32 *)(0x08000000 + offsets[i] + 4) = *((u32 *)arm9_exceptions + 1 + i);
}
}

View File

@ -74,11 +74,7 @@ void main(void)
//Attempt to read the configuration file
needConfig = readConfig() ? MODIFY_CONFIGURATION : CREATE_CONFIGURATION;
if(DEV_OPTIONS != 2)
{
detectAndProcessExceptionDumps();
installArm9Handlers();
}
detectAndProcessExceptionDumps();
//Determine if this is a firmlaunch boot
if(launchedFirmTidLow[5] != 0)
@ -93,6 +89,8 @@ void main(void)
nandType = (FirmwareSource)BOOTCONFIG(0, 3);
firmSource = (FirmwareSource)BOOTCONFIG(2, 1);
isA9lh = BOOTCONFIG(3, 1) != 0;
if(isA9lh) installArm9Handlers();
}
else
{
@ -105,6 +103,8 @@ void main(void)
//Determine if booting with A9LH
isA9lh = !PDN_SPI_CNT;
if(isA9lh) installArm9Handlers();
//Save old options and begin saving the new boot configuration
configTemp = (configData.config & 0xFFFFFFC0) | ((u32)isA9lh << 3);
@ -340,9 +340,9 @@ static inline void patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32
//Apply UNITINFO patch
if(DEV_OPTIONS == 1) patchUnitInfoValueSet(arm9Section, section[2].size);
if(DEV_OPTIONS != 2)
if(isA9lh && DEV_OPTIONS != 2)
{
//Install arm11 exception handlers
//Install ARM11 exception handlers
u32 codeSetOffset;
u32 stackAddress = getInfoForArm11ExceptionHandlers(arm11Section1, section[1].size, &codeSetOffset);
installArm11Handlers(arm11ExceptionsPage, stackAddress, codeSetOffset);

View File

@ -241,19 +241,17 @@ void patchArm9ExceptionHandlersInstall(u8 *pos, u32 size)
for(u32 r0 = 0x08000000; *off != 0xE3A01040; off++) //Until mov r1, #0x40
{
if((*off >> 26) != 0x39 || ((*off >> 16) & 0xF) != 0 || ((*off >> 25) & 1) != 0 || ((*off >> 20) & 5) != 0)
continue; //Discard everything that's not str rX, [r0, #imm](!)
//Discard everything that's not str rX, [r0, #imm](!)
if((*off & 0xFE5F0000) != 0xE4000000) continue;
int rD = (*off >> 12) & 0xF,
offset = (*off & 0xFFF) * ((((*off >> 23) & 1) == 0) ? -1 : 1),
writeback = (*off >> 21) & 1,
pre = (*off >> 24) & 1;
u32 rD = (*off >> 12) & 0xF,
offset = (*off & 0xFFF) * ((((*off >> 23) & 1) == 0) ? -1 : 1);
bool writeback = ((*off >> 21) & 1) != 0,
pre = ((*off >> 24) & 1) != 0;
u32 addr = r0 + ((pre || !writeback) ? offset : 0);
if((addr & 7) != 0 && addr != 0x08000014 && addr != 0x08000004)
*off = 0xE1A00000; //nop
else
*off = 0xE5800000 | (rD << 12) | (addr & 0xFFF); //Preserve IRQ and SVC handlers
if((addr & 7) != 0 && addr != 0x08000014 && addr != 0x08000004) *off = 0xE1A00000; //nop
else *off = 0xE5800000 | (rD << 12) | (addr & 0xFFF); //Preserve IRQ and SVC handlers
if(!pre) addr += offset;
if(writeback) r0 = addr;
@ -291,7 +289,7 @@ void patchSvcBreak9(u8 *pos, u32 size, u32 kernel9Address)
void patchSvcBreak11(u8 *pos, u32 *arm11SvcTable)
{
//Same as above, for NFIRM arm11
//Same as above, for NATIVE_FIRM ARM11
u32 *addr = (u32 *)(pos + arm11SvcTable[0x3C] - 0xFFF00000);
*addr = 0xE12FFF7F;
}