More cleanup, ARM9 exceptions for Luma and payloads are always enabled (FIRM ARM9 and ARM11 exceptions need Dev. options not to be "none")
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0b33551d94
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d412711868
@ -34,16 +34,16 @@
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void installArm9Handlers(void)
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{
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const u32 offsets[] = {0x08, 0x18, 0x20, 0x28};
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memcpy((void *)0x01FF8000, arm9_exceptions + 32, arm9_exceptions_size - 32);
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//IRQHandler is at 0x08000000, but we won't handle it for some reasons
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//svcHandler is at 0x08000010, but we won't handle svc either
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/* IRQHandler is at 0x08000000, but we won't handle it for some reasons
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svcHandler is at 0x08000010, but we won't handle svc either */
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for(u32 i = 0; i < 4; i++)
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{
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*(vu32 *)(0x08000000 + offsets[i]) = 0xE51FF004;
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*(vu32 *)(0x08000000 + offsets[i] + 4) = *((const u32 *)arm9_exceptions + 1 + i);
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*(vu32 *)(0x08000000 + offsets[i] + 4) = *((u32 *)arm9_exceptions + 1 + i);
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}
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}
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@ -51,7 +51,7 @@ void installArm11Handlers(u32 *exceptionsPage, u32 stackAddress, u32 codeSetOffs
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{
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u32 *initFPU;
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for(initFPU = exceptionsPage; initFPU < (exceptionsPage + 0x400) && (initFPU[0] != 0xE59F0008 || initFPU[1] != 0xE5900000); initFPU++);
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u32 *mcuReboot;
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for(mcuReboot = exceptionsPage; mcuReboot < (exceptionsPage + 0x400) && (mcuReboot[0] != 0xE59F4104 || mcuReboot[1] != 0xE3A0A0C2); mcuReboot++);
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mcuReboot--;
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@ -60,12 +60,12 @@ void installArm11Handlers(u32 *exceptionsPage, u32 stackAddress, u32 codeSetOffs
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for(freeSpace = initFPU; freeSpace < (exceptionsPage + 0x400) && (freeSpace[0] != 0xFFFFFFFF || freeSpace[1] != 0xFFFFFFFF); freeSpace++);
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memcpy(freeSpace, arm11_exceptions + 32, arm11_exceptions_size - 32);
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exceptionsPage[1] = MAKE_BRANCH(exceptionsPage + 1, (u8 *)freeSpace + *(u32 *)(arm11_exceptions + 8) - 32); //Undefined Instruction
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exceptionsPage[3] = MAKE_BRANCH(exceptionsPage + 3, (u8 *)freeSpace + *(u32 *)(arm11_exceptions + 12) - 32); //Prefetch Abort
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exceptionsPage[4] = MAKE_BRANCH(exceptionsPage + 4, (u8 *)freeSpace + *(u32 *)(arm11_exceptions + 16) - 32); //Data Abort
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exceptionsPage[7] = MAKE_BRANCH(exceptionsPage + 7, (u8 *)freeSpace + *(u32 *)(arm11_exceptions + 4) - 32); //FIQ
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for(u32 *pos = freeSpace; pos < (u32 *)((u8 *)freeSpace + arm11_exceptions_size - 32); pos++)
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{
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switch(*pos) //Perform relocations
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@ -105,12 +105,12 @@ void detectAndProcessExceptionDumps(void)
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const char *handledExceptionNames[] = {
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"FIQ", "undefined instruction", "prefetch abort", "data abort"
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};
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const char *registerNames[] = {
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"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10", "R11", "R12",
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"SP", "LR", "PC", "CPSR", "FPEXC"
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};
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char hexstring[] = "00000000";
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char arm11Str[] = "Processor: ARM11 (core X)";
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@ -120,10 +120,10 @@ void detectAndProcessExceptionDumps(void)
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drawString("An exception occurred", 10, 10, COLOR_RED);
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int posY = drawString(dumpHeader->processor == 11 ? arm11Str : "Processor: ARM9", 10, 30, COLOR_WHITE) + SPACING_Y;
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posY = drawString("Exception type: ", 10, posY, COLOR_WHITE);
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posY = drawString(handledExceptionNames[dumpHeader->type], 10 + 17 * SPACING_X, posY, COLOR_WHITE);
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if(dumpHeader->type == 2)
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{
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if((regs[16] & 0x20) == 0 && dumpHeader->codeDumpSize >= 4)
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@ -149,7 +149,7 @@ void detectAndProcessExceptionDumps(void)
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memcpy(processNameStr + 17, (char *)additionalData, 8);
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posY = drawString(processNameStr, 10, posY, COLOR_WHITE);
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}
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posY += 3 * SPACING_Y;
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for(u32 i = 0; i < 17; i += 2)
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@ -169,14 +169,14 @@ void detectAndProcessExceptionDumps(void)
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}
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posY += 2 * SPACING_Y;
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u32 mode = regs[16] & 0xF;
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if(dumpHeader->type == 3 && (mode == 7 || mode == 11))
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{
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posY = drawString("Incorrect dump: failed to dump code and/or stack", 10, posY, 0x00FFFF) + 2 * SPACING_Y; //In yellow
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if(dumpHeader->processor != 9) posY -= SPACING_Y;
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}
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posY = drawString("You can find a dump in the following file:", 10, posY, COLOR_WHITE) + SPACING_Y;
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posY = drawString(path, 10, posY, COLOR_WHITE) + 2 * SPACING_Y;
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drawString("Press any button to shutdown", 10, posY, COLOR_WHITE);
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@ -74,11 +74,7 @@ void main(void)
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//Attempt to read the configuration file
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needConfig = readConfig() ? MODIFY_CONFIGURATION : CREATE_CONFIGURATION;
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if(DEV_OPTIONS != 2)
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{
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detectAndProcessExceptionDumps();
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installArm9Handlers();
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}
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detectAndProcessExceptionDumps();
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//Determine if this is a firmlaunch boot
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if(launchedFirmTidLow[5] != 0)
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@ -93,6 +89,8 @@ void main(void)
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nandType = (FirmwareSource)BOOTCONFIG(0, 3);
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firmSource = (FirmwareSource)BOOTCONFIG(2, 1);
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isA9lh = BOOTCONFIG(3, 1) != 0;
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if(isA9lh) installArm9Handlers();
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}
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else
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{
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@ -105,6 +103,8 @@ void main(void)
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//Determine if booting with A9LH
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isA9lh = !PDN_SPI_CNT;
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if(isA9lh) installArm9Handlers();
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//Save old options and begin saving the new boot configuration
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configTemp = (configData.config & 0xFFFFFFC0) | ((u32)isA9lh << 3);
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@ -339,10 +339,10 @@ static inline void patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32
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//Apply UNITINFO patch
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if(DEV_OPTIONS == 1) patchUnitInfoValueSet(arm9Section, section[2].size);
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if(DEV_OPTIONS != 2)
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if(isA9lh && DEV_OPTIONS != 2)
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{
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//Install arm11 exception handlers
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//Install ARM11 exception handlers
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u32 codeSetOffset;
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u32 stackAddress = getInfoForArm11ExceptionHandlers(arm11Section1, section[1].size, &codeSetOffset);
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installArm11Handlers(arm11ExceptionsPage, stackAddress, codeSetOffset);
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@ -381,7 +381,7 @@ static inline void patchLegacyFirm(FirmwareType firmType)
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arm9Loader(arm9Section);
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firm->arm9Entry = (u8 *)0x801301C;
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}
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//Apply UNITINFO patch
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if(DEV_OPTIONS == 1) patchUnitInfoValueSet(arm9Section, section[3].size);
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@ -241,19 +241,17 @@ void patchArm9ExceptionHandlersInstall(u8 *pos, u32 size)
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for(u32 r0 = 0x08000000; *off != 0xE3A01040; off++) //Until mov r1, #0x40
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{
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if((*off >> 26) != 0x39 || ((*off >> 16) & 0xF) != 0 || ((*off >> 25) & 1) != 0 || ((*off >> 20) & 5) != 0)
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continue; //Discard everything that's not str rX, [r0, #imm](!)
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//Discard everything that's not str rX, [r0, #imm](!)
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if((*off & 0xFE5F0000) != 0xE4000000) continue;
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int rD = (*off >> 12) & 0xF,
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offset = (*off & 0xFFF) * ((((*off >> 23) & 1) == 0) ? -1 : 1),
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writeback = (*off >> 21) & 1,
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pre = (*off >> 24) & 1;
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u32 rD = (*off >> 12) & 0xF,
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offset = (*off & 0xFFF) * ((((*off >> 23) & 1) == 0) ? -1 : 1);
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bool writeback = ((*off >> 21) & 1) != 0,
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pre = ((*off >> 24) & 1) != 0;
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u32 addr = r0 + ((pre || !writeback) ? offset : 0);
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if((addr & 7) != 0 && addr != 0x08000014 && addr != 0x08000004)
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*off = 0xE1A00000; //nop
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else
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*off = 0xE5800000 | (rD << 12) | (addr & 0xFFF); //Preserve IRQ and SVC handlers
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if((addr & 7) != 0 && addr != 0x08000014 && addr != 0x08000004) *off = 0xE1A00000; //nop
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else *off = 0xE5800000 | (rD << 12) | (addr & 0xFFF); //Preserve IRQ and SVC handlers
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if(!pre) addr += offset;
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if(writeback) r0 = addr;
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@ -291,7 +289,7 @@ void patchSvcBreak9(u8 *pos, u32 size, u32 kernel9Address)
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void patchSvcBreak11(u8 *pos, u32 *arm11SvcTable)
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{
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//Same as above, for NFIRM arm11
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//Same as above, for NATIVE_FIRM ARM11
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u32 *addr = (u32 *)(pos + arm11SvcTable[0x3C] - 0xFFF00000);
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*addr = 0xE12FFF7F;
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}
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