Setting "Dev. Options" to "None" no longer disable exception handling and related patches.
Removed the patch that disables execution protection on the global kernel FCRAM and VRAM mapping as it was unused, worthless, and caused bugs in the past.
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25811e2b52
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@ -28,7 +28,7 @@
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#define MULTICONFIG(a) ((config >> (a * 2 + 6)) & 3)
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#define MULTICONFIG(a) ((config >> (a * 2 + 6)) & 3)
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#define BOOTCONFIG(a, b) ((config >> a) & b)
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#define BOOTCONFIG(a, b) ((config >> a) & b)
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#define DEVMODE MULTICONFIG(2)
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#define DEV_OPTIONS MULTICONFIG(2)
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extern u32 config;
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extern u32 config;
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@ -76,11 +76,8 @@ void main(void)
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//Attempt to read the configuration file
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//Attempt to read the configuration file
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needConfig = fileRead(&config, configPath) ? MODIFY_CONFIGURATION : CREATE_CONFIGURATION;
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needConfig = fileRead(&config, configPath) ? MODIFY_CONFIGURATION : CREATE_CONFIGURATION;
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if(DEVMODE)
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{
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detectAndProcessExceptionDumps();
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detectAndProcessExceptionDumps();
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installArm9Handlers();
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installArm9Handlers();
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}
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//Determine if this is a firmlaunch boot
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//Determine if this is a firmlaunch boot
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if(*(vu8 *)0x23F00005)
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if(*(vu8 *)0x23F00005)
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@ -345,10 +342,8 @@ static inline void patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32
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reimplementSvcBackdoor(arm11Section1, section[1].size);
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reimplementSvcBackdoor(arm11Section1, section[1].size);
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}
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}
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if(DEVMODE)
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{
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//Apply UNITINFO patch
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//Apply UNITINFO patch
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if(DEVMODE == 2) patchUnitInfoValueSet(arm9Section, section[2].size);
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if(DEV_OPTIONS == 2) patchUnitInfoValueSet(arm9Section, section[2].size);
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//Install arm11 exception handlers
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//Install arm11 exception handlers
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u32 stackAddress, codeSetOffset;
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u32 stackAddress, codeSetOffset;
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@ -365,10 +360,6 @@ static inline void patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32
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//Stub kernel11panic with "bkpt 65534"
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//Stub kernel11panic with "bkpt 65534"
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patchKernel11Panic(arm11Section1, section[1].size);
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patchKernel11Panic(arm11Section1, section[1].size);
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//Make FCRAM (and VRAM as a side effect) globally executable from arm11 kernel
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patchKernelFCRAMAndVRAMMappingPermissions(arm11Section1, section[1].size);
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}
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if(CONFIG(8))
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if(CONFIG(8))
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{
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{
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patchArm11SvcAccessChecks(arm11Section1, section[1].size);
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patchArm11SvcAccessChecks(arm11Section1, section[1].size);
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@ -388,13 +379,10 @@ static inline void patchLegacyFirm(FirmwareType firmType)
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firm->arm9Entry = (u8 *)0x801301C;
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firm->arm9Entry = (u8 *)0x801301C;
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}
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}
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if(DEVMODE)
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{
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//Kernel9/Process9 debugging
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//Kernel9/Process9 debugging
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patchExceptionHandlersInstall(arm9Section, section[3].size);
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patchExceptionHandlersInstall(arm9Section, section[3].size);
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patchSvcBreak9(arm9Section, section[3].size, (u32)(section[3].address));
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patchSvcBreak9(arm9Section, section[3].size, (u32)(section[3].address));
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patchKernel9Panic(arm9Section, section[3].size, firmType);
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patchKernel9Panic(arm9Section, section[3].size, firmType);
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}
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applyLegacyFirmPatches((u8 *)firm, firmType);
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applyLegacyFirmPatches((u8 *)firm, firmType);
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}
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}
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@ -413,12 +401,9 @@ static inline void patchSafeFirm(void)
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}
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}
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else patchFirmWriteSafe(arm9Section, section[2].size);
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else patchFirmWriteSafe(arm9Section, section[2].size);
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if(DEVMODE)
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{
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//Kernel9/Process9 debugging
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//Kernel9/Process9 debugging
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patchExceptionHandlersInstall(arm9Section, section[2].size);
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patchExceptionHandlersInstall(arm9Section, section[2].size);
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patchSvcBreak9(arm9Section, section[2].size, (u32)(section[2].address));
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patchSvcBreak9(arm9Section, section[2].size, (u32)(section[2].address));
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}
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}
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}
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static inline void copySection0AndInjectSystemModules(FirmwareType firmType)
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static inline void copySection0AndInjectSystemModules(FirmwareType firmType)
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@ -291,17 +291,6 @@ void patchUnitInfoValueSet(u8 *pos, u32 size)
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off[3] = 0xE3;
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off[3] = 0xE3;
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}
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}
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void patchKernelFCRAMAndVRAMMappingPermissions(u8 *pos, u32 size)
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{
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//Look for MMU config
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const u8 pattern[] = {0x97, 0x05, 0x00, 0x00, 0x15, 0xE4, 0x00, 0x00};
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u32 *off = (u32 *)memsearch(pos, pattern, size, 8);
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while(off != NULL && *off != 0x16416) off--;
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if(off != NULL) *off &= ~(1 << 4); //Clear XN bit
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}
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void reimplementSvcBackdoor(u8 *pos, u32 size)
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void reimplementSvcBackdoor(u8 *pos, u32 size)
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{
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{
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//Official implementation of svcBackdoor
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//Official implementation of svcBackdoor
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@ -51,7 +51,6 @@ void patchArm11SvcAccessChecks(u8 *pos, u32 size);
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void patchK11ModuleChecks(u8 *pos, u32 size);
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void patchK11ModuleChecks(u8 *pos, u32 size);
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void patchP9AccessChecks(u8 *pos, u32 size);
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void patchP9AccessChecks(u8 *pos, u32 size);
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void patchUnitInfoValueSet(u8 *pos, u32 size);
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void patchUnitInfoValueSet(u8 *pos, u32 size);
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void patchKernelFCRAMAndVRAMMappingPermissions(u8 *pos, u32 size);
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void reimplementSvcBackdoor(u8 *pos, u32 size);
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void reimplementSvcBackdoor(u8 *pos, u32 size);
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void applyLegacyFirmPatches(u8 *pos, FirmwareType firmType);
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void applyLegacyFirmPatches(u8 *pos, FirmwareType firmType);
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u8 *getUnitInfoValueSet(u8 *pos, u32 size);
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u8 *getUnitInfoValueSet(u8 *pos, u32 size);
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@ -72,6 +72,7 @@ start:
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@ Enable caches / MPU
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@ Enable caches / MPU
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mrc p15, 0, r0, c1, c0, 0 @ read control register
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mrc p15, 0, r0, c1, c0, 0 @ read control register
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orr r0, r0, #(1<<13) @ - alternate exception vectors enable
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orr r0, r0, #(1<<12) @ - instruction cache enable
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orr r0, r0, #(1<<12) @ - instruction cache enable
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orr r0, r0, #(1<<2) @ - data cache enable
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orr r0, r0, #(1<<2) @ - data cache enable
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orr r0, r0, #(1<<0) @ - mpu enable
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orr r0, r0, #(1<<0) @ - mpu enable
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