From 88891ef6cd35057db64009959f9beff0b3750f45 Mon Sep 17 00:00:00 2001 From: TuxSH Date: Sat, 13 Aug 2016 15:31:08 +0200 Subject: [PATCH] Setting "Dev. Options" to "None" no longer disable exception handling and related patches. Removed the patch that disables execution protection on the global kernel FCRAM and VRAM mapping as it was unused, worthless, and caused bugs in the past. --- source/config.h | 2 +- source/firm.c | 69 +++++++++++++++++++----------------------------- source/patches.c | 11 -------- source/patches.h | 1 - source/start.s | 1 + 5 files changed, 29 insertions(+), 55 deletions(-) diff --git a/source/config.h b/source/config.h index f0e7505..7a5acbe 100644 --- a/source/config.h +++ b/source/config.h @@ -28,7 +28,7 @@ #define MULTICONFIG(a) ((config >> (a * 2 + 6)) & 3) #define BOOTCONFIG(a, b) ((config >> a) & b) -#define DEVMODE MULTICONFIG(2) +#define DEV_OPTIONS MULTICONFIG(2) extern u32 config; diff --git a/source/firm.c b/source/firm.c index a75d910..e10b131 100755 --- a/source/firm.c +++ b/source/firm.c @@ -76,11 +76,8 @@ void main(void) //Attempt to read the configuration file needConfig = fileRead(&config, configPath) ? MODIFY_CONFIGURATION : CREATE_CONFIGURATION; - if(DEVMODE) - { - detectAndProcessExceptionDumps(); - installArm9Handlers(); - } + detectAndProcessExceptionDumps(); + installArm9Handlers(); //Determine if this is a firmlaunch boot if(*(vu8 *)0x23F00005) @@ -345,30 +342,24 @@ static inline void patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 reimplementSvcBackdoor(arm11Section1, section[1].size); } - if(DEVMODE) - { - //Apply UNITINFO patch - if(DEVMODE == 2) patchUnitInfoValueSet(arm9Section, section[2].size); - - //Install arm11 exception handlers - u32 stackAddress, codeSetOffset; - u32 *exceptionsPage = getInfoForArm11ExceptionHandlers(arm11Section1, section[1].size, &stackAddress, &codeSetOffset); - installArm11Handlers(exceptionsPage, stackAddress, codeSetOffset); - - //Kernel9/Process9 debugging - patchExceptionHandlersInstall(arm9Section, section[2].size); - patchSvcBreak9(arm9Section, section[2].size, (u32)(section[2].address)); - patchKernel9Panic(arm9Section, section[2].size, NATIVE_FIRM); - - //Stub svcBreak11 with "bkpt 65535" - patchSvcBreak11(arm11Section1, section[1].size); - //Stub kernel11panic with "bkpt 65534" - patchKernel11Panic(arm11Section1, section[1].size); - - //Make FCRAM (and VRAM as a side effect) globally executable from arm11 kernel - patchKernelFCRAMAndVRAMMappingPermissions(arm11Section1, section[1].size); - } - + //Apply UNITINFO patch + if(DEV_OPTIONS == 2) patchUnitInfoValueSet(arm9Section, section[2].size); + + //Install arm11 exception handlers + u32 stackAddress, codeSetOffset; + u32 *exceptionsPage = getInfoForArm11ExceptionHandlers(arm11Section1, section[1].size, &stackAddress, &codeSetOffset); + installArm11Handlers(exceptionsPage, stackAddress, codeSetOffset); + + //Kernel9/Process9 debugging + patchExceptionHandlersInstall(arm9Section, section[2].size); + patchSvcBreak9(arm9Section, section[2].size, (u32)(section[2].address)); + patchKernel9Panic(arm9Section, section[2].size, NATIVE_FIRM); + + //Stub svcBreak11 with "bkpt 65535" + patchSvcBreak11(arm11Section1, section[1].size); + //Stub kernel11panic with "bkpt 65534" + patchKernel11Panic(arm11Section1, section[1].size); + if(CONFIG(8)) { patchArm11SvcAccessChecks(arm11Section1, section[1].size); @@ -388,13 +379,10 @@ static inline void patchLegacyFirm(FirmwareType firmType) firm->arm9Entry = (u8 *)0x801301C; } - if(DEVMODE) - { - //Kernel9/Process9 debugging - patchExceptionHandlersInstall(arm9Section, section[3].size); - patchSvcBreak9(arm9Section, section[3].size, (u32)(section[3].address)); - patchKernel9Panic(arm9Section, section[3].size, firmType); - } + //Kernel9/Process9 debugging + patchExceptionHandlersInstall(arm9Section, section[3].size); + patchSvcBreak9(arm9Section, section[3].size, (u32)(section[3].address)); + patchKernel9Panic(arm9Section, section[3].size, firmType); applyLegacyFirmPatches((u8 *)firm, firmType); } @@ -413,12 +401,9 @@ static inline void patchSafeFirm(void) } else patchFirmWriteSafe(arm9Section, section[2].size); - if(DEVMODE) - { - //Kernel9/Process9 debugging - patchExceptionHandlersInstall(arm9Section, section[2].size); - patchSvcBreak9(arm9Section, section[2].size, (u32)(section[2].address)); - } + //Kernel9/Process9 debugging + patchExceptionHandlersInstall(arm9Section, section[2].size); + patchSvcBreak9(arm9Section, section[2].size, (u32)(section[2].address)); } static inline void copySection0AndInjectSystemModules(FirmwareType firmType) diff --git a/source/patches.c b/source/patches.c index 4c49c93..a97c5b0 100644 --- a/source/patches.c +++ b/source/patches.c @@ -291,17 +291,6 @@ void patchUnitInfoValueSet(u8 *pos, u32 size) off[3] = 0xE3; } -void patchKernelFCRAMAndVRAMMappingPermissions(u8 *pos, u32 size) -{ - //Look for MMU config - const u8 pattern[] = {0x97, 0x05, 0x00, 0x00, 0x15, 0xE4, 0x00, 0x00}; - - u32 *off = (u32 *)memsearch(pos, pattern, size, 8); - while(off != NULL && *off != 0x16416) off--; - - if(off != NULL) *off &= ~(1 << 4); //Clear XN bit -} - void reimplementSvcBackdoor(u8 *pos, u32 size) { //Official implementation of svcBackdoor diff --git a/source/patches.h b/source/patches.h index b7814b6..a2c1c81 100644 --- a/source/patches.h +++ b/source/patches.h @@ -51,7 +51,6 @@ void patchArm11SvcAccessChecks(u8 *pos, u32 size); void patchK11ModuleChecks(u8 *pos, u32 size); void patchP9AccessChecks(u8 *pos, u32 size); void patchUnitInfoValueSet(u8 *pos, u32 size); -void patchKernelFCRAMAndVRAMMappingPermissions(u8 *pos, u32 size); void reimplementSvcBackdoor(u8 *pos, u32 size); void applyLegacyFirmPatches(u8 *pos, FirmwareType firmType); u8 *getUnitInfoValueSet(u8 *pos, u32 size); diff --git a/source/start.s b/source/start.s index 4d40922..b135f60 100644 --- a/source/start.s +++ b/source/start.s @@ -72,6 +72,7 @@ start: @ Enable caches / MPU mrc p15, 0, r0, c1, c0, 0 @ read control register + orr r0, r0, #(1<<13) @ - alternate exception vectors enable orr r0, r0, #(1<<12) @ - instruction cache enable orr r0, r0, #(1<<2) @ - data cache enable orr r0, r0, #(1<<0) @ - mpu enable