Stub svc 0x59
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@ -172,6 +172,13 @@ u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, boo
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ret += reimplementSvcBackdoor(arm11Section1, arm11SvcTable, baseK11VA, &freeK11Space);
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}
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//11.3 FIRM patches
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if(firmVersion >= (ISN3DS ? 0x2D : 0x5C))
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{
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//Stub svc 0x59
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ret += stubSvcRestrictGpuDma(arm11Section1, arm11SvcTable, baseK11VA);
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}
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ret += implementSvcGetCFWInfo(arm11Section1, arm11SvcTable, baseK11VA, &freeK11Space, isSafeMode);
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//Apply UNITINFO patches
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@ -294,7 +301,7 @@ u32 patch1x2xNativeAndSafeFirm(u32 devMode)
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ret = 0;
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ret += ISN3DS ? patchFirmWrites(process9Offset, process9Size) : patchOldFirmWrites(process9Offset, process9Size);
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ret += ISN3DS ? patchSignatureChecks(process9Offset, process9Size) : patchOldSignatureChecks(process9Offset, process9Size);
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if(devMode != 0)
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@ -283,6 +283,17 @@ u32 reimplementSvcBackdoor(u8 *pos, u32 *arm11SvcTable, u32 baseK11VA, u8 **free
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return 0;
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}
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u32 stubSvcRestrictGpuDma(u8 *pos, u32 *arm11SvcTable, u32 baseK11VA)
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{
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if(arm11SvcTable[0x59] != 0)
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{
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u32 *off = (u32 *)(pos + arm11SvcTable[0x59] - baseK11VA);
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off[1] = 0xE1A00000; //replace call to inner function by a NOP
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}
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return 0;
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}
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u32 implementSvcGetCFWInfo(u8 *pos, u32 *arm11SvcTable, u32 baseK11VA, u8 **freeK11Space, bool isSafeMode)
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{
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if(*(u32 *)(*freeK11Space + svcGetCFWInfo_bin_size - 4) != 0xFFFFFFFF) return 1;
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@ -46,6 +46,7 @@ u32 patchZeroKeyNcchEncryptionCheck(u8 *pos, u32 size);
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u32 patchNandNcchEncryptionCheck(u8 *pos, u32 size);
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u32 patchCheckForDevCommonKey(u8 *pos, u32 size);
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u32 reimplementSvcBackdoor(u8 *pos, u32 *arm11SvcTable, u32 baseK11VA, u8 **freeK11Space);
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u32 stubSvcRestrictGpuDma(u8 *pos, u32 *arm11SvcTable, u32 baseK11VA);
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u32 implementSvcGetCFWInfo(u8 *pos, u32 *arm11SvcTable, u32 baseK11VA, u8 **freeK11Space, bool isSafeMode);
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u32 patchArm9ExceptionHandlersInstall(u8 *pos, u32 size);
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u32 getInfoForArm11ExceptionHandlers(u8 *pos, u32 size, u32 *codeSetOffset);
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