106 lines
2.4 KiB
ArmAsm
106 lines
2.4 KiB
ArmAsm
@
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@ handlers.s
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@ by TuxSH
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@
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@ This is part of Luma3DS, see LICENSE.txt for details
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@
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.macro GEN_HANDLER name
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.global \name
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.type \name, %function
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\name:
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ldr sp, =#0xffff3000
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stmfd sp!, {r0-r7}
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mov r1, #\@ @ macro expansion counter
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b _commonHandler
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.size \name, . - \name
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.endm
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.text
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.arm
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.align 4
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.global _commonHandler
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.type _commonHandler, %function
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_commonHandler:
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clrex
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cpsid aif
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mrs r2, spsr
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mov r6, sp
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mrs r3, cpsr
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ands r4, r2, #0xf @ get the mode that triggered the exception
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moveq r4, #0xf @ usr => sys
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bic r5, r3, #0xf
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orr r5, r4
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msr cpsr_c, r5 @ change processor mode
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stmfd r6!, {r8-lr}
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msr cpsr_c, r3 @ restore processor mode
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mov sp, r6
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fmrx r3, fpexc
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cmp r1, #1
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bne noFPUInit
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tst r5, #0x20
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bne noFPUInit
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ldr r4, [lr, #-4]
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lsl r4, #4
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sub r4, #0xc0000000
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cmp r4, #0x30000000
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bcs noFPUInit
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tst r3, #0x40000000
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bne noFPUInit
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sub lr, #4
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srsfd sp!, #0x13
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add sp, #28 @ restore context
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ldmfd sp!, {r0-r7}
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cps #0x13 @ FPU init
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stmfd sp, {r0-r3, r11-lr}^
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sub sp, #0x20
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bl . @ will be replaced
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ldmfd sp, {r0-r3, r11-lr}^
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add sp, #0x20
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rfefd sp!
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noFPUInit:
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stmfd sp!, {r2,lr}
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mrc p15,0,r4,c5,c0,0 @ dfsr
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mrc p15,0,r5,c5,c0,1 @ ifsr
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mrc p15,0,r6,c6,c0,0 @ far
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mov r7, r3
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fmrx r8, fpinst
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fmrx r9, fpinst2
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stmfd sp!, {r4-r9} @ it's a bit of a mess, but we will fix that later
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@ order of saved regs now: dfsr, ifsr, far, fpexc, fpinst, fpinst2, cpsr, pc + (2/4/8), r8-r14, r0-r7
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bic r3, #(1<<31)
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fmxr fpexc, r3 @ clear the VFP11 exception flag (if it's set)
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mov r0, sp
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mrc p15,0,r2,c0,c0,5 @ CPU ID register
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b mainHandler
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GEN_HANDLER FIQHandler
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GEN_HANDLER undefinedInstructionHandler
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GEN_HANDLER prefetchAbortHandler
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GEN_HANDLER dataAbortHandler
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.global mcuReboot
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.type mcuReboot, %function
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mcuReboot:
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b . @ will be replaced
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.global clearDCacheAndDMB
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.type clearDCacheAndDMB, %function
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clearDCacheAndDMB:
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mov r0, #0
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mcr p15,0,r0,c7,c14,0 @ Clean and Invalidate Entire Data Cache
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mcr p15,0,r0,c7,c10,4 @ Drain Memory Barrier
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bx lr
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