57 lines
2.1 KiB
ArmAsm
57 lines
2.1 KiB
ArmAsm
@ This file is part of Luma3DS
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@ Copyright (C) 2016 Aurora Wright, TuxSH
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@
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@ This program is free software: you can redistribute it and/or modify
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@ it under the terms of the GNU General Public License as published by
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@ the Free Software Foundation, either version 3 of the License, or
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@ (at your option) any later version.
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@
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@ This program is distributed in the hope that it will be useful,
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@ but WITHOUT ANY WARRANTY; without even the implied warranty of
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@ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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@ GNU General Public License for more details.
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@
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@ You should have received a copy of the GNU General Public License
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@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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@
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@ Additional Terms 7.b of GPLv3 applies to this file: Requiring preservation of specified
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@ reasonable legal notices or author attributions in that material or in the Appropriate Legal
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@ Notices displayed by works containing it.
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.text
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.arm
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.align 4
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.global flushCaches
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.type flushCaches, %function
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flushCaches:
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@ Clean and flush both the data cache and instruction caches
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@ Adpated from http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0155a/ch03s03s05.html ,
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@ and https://github.com/gemarcano/libctr9_io/blob/master/src/ctr_system_ARM.c#L39 as well
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@ Note: ARM's example is actually for a 8KB DCache (which is what the 3DS has)
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@ Implemented in bootROM at addresses 0xffff0830 (DCache) and 0xffff0ab4 (ICache)
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mov r1, #0 @ segment counter
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outer_loop:
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mov r0, #0 @ line counter
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inner_loop:
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orr r2, r1, r0 @ generate segment and line address
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mcr p15, 0, r2, c7, c14, 2 @ clean and flush the line
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add r0, #0x20 @ increment to next line
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cmp r0, #0x400
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bne inner_loop
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add r1, #0x40000000
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cmp r1, #0
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bne outer_loop
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mcr p15, 0, r1, c7, c10, 4 @ drain write buffer
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@ Flush instruction cache
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mcr p15, 0, r1, c7, c5, 0
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bx lr
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