114 lines
4.1 KiB
C
114 lines
4.1 KiB
C
/*
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* firm.c
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* by Reisyukaku
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* Copyright (c) 2015 All Rights Reserved
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*/
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#include "firm.h"
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#include "patches.h"
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#include "memory.h"
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#include "fs.h"
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#include "emunand.h"
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#include "crypto.h"
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firmHeader *firmLocation = (firmHeader *)0x24000000;
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const u32 firmSize = 0xF1000;
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firmSectionHeader *section;
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u32 emuOffset = 0;
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u32 emuHeader = 0;
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u32 kversion = 0;
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//Load firm into FCRAM
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void loadFirm(int mode){
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//Sysnand mode
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if(mode == 0 || getEmunand(&emuOffset, &emuHeader) == 0){
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//Read FIRM from NAND and write to FCRAM
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nandFirm0((u8*)firmLocation, firmSize);
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section = firmLocation->section;
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kversion = 0x04; //TODO: make this not hard coded
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decryptArm9Bin((u8*)firmLocation + section[2].offset, kversion);
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}
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//Emunand mode
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else{
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//Read FIRM from SD card and write to FCRAM
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fileRead((u8*)firmLocation, "/rei/firmware.bin", firmSize);
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section = firmLocation->section;
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kversion = 0x0F; //TODO: make this not hard coded
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loadEmu();
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}
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}
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//Nand redirection
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void loadEmu(void){
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//Read emunand code from SD
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u32 code = emuCode();
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fileRead((u8*)code, "/rei/emunand/emunand.bin", 0);
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u32 *pos_offset = memsearch((u8*)code, "NAND", 0x218, 4);
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u32 *pos_header = memsearch((u8*)code, "NCSD", 0x218, 4);
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memcpy((void *)pos_offset, (void *)emuOffset, 4);
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memcpy((void *)pos_header, (void *)emuHeader, 4);
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//Add emunand hooks
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memcpy((u8*)emuHook(1), eh1, sizeof(eh1));
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memcpy((u8*)emuHook(2), eh2, sizeof(eh2));
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memcpy((u8*)emuHook(3), eh3, sizeof(eh3));
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}
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//Patches
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void patchFirm(){
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//Part1: Set MPU for payload area
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memcpy((u8*)mpuCode(kversion), mpu, sizeof(mpu));
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//Part2: Disable signature checks
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memcpy((u8*)sigPatch(1, kversion), p1, sizeof(p1));
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memcpy((u8*)sigPatch(2, kversion), p2, sizeof(p2));
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//Part3: Create arm9 thread
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fileRead((u8*)threadCode(kversion), "/rei/thread/arm9.bin", 0);
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if(kversion == 0x0F){ //TODO: 0F only untill i can figure out why the hell this doesnt work on sysnand anymore.
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memcpy((u8*)threadHook(1, kversion), th1, sizeof(th1));
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memcpy((u8*)threadHook(2, kversion), th2, sizeof(th2));
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}
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}
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//Firmlaunchhax
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void launchFirm(void){
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//Set MPU
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__asm__ (
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"msr cpsr_c, #0xDF\n\t" //Set system mode, disable interrupts
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"ldr r0, =0x10000035\n\t" //Memory area 0x10000000-0x18000000, enabled, 128MB
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"ldr r4, =0x18000035\n\t" //Memory area 0x18000000-0x20000000, enabled, 128MB
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"mcr p15, 0, r0, c6, c3, 0\n\t" //Set memory area 3 (0x10000000-0x18000000)
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"mcr p15, 0, r4, c6, c4, 0\n\t" //Set memory area 4 (0x18000000-0x20000000)
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"mrc p15, 0, r0, c2, c0, 0\n\t" //read data cacheable bit
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"mrc p15, 0, r4, c2, c0, 1\n\t" //read inst cacheable bit
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"mrc p15, 0, r1, c3, c0, 0\n\t" //read data writeable
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"mrc p15, 0, r2, c5, c0, 2\n\t" //read data access permission
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"mrc p15, 0, r3, c5, c0, 3\n\t" //read inst access permission
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"orr r0, r0, #0x30\n\t"
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"orr r4, r4, #0x30\n\t"
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"orr r1, r1, #0x30\n\t"
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"bic r2, r2, #0xF0000\n\t"
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"bic r3, r3, #0xF0000\n\t"
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"orr r2, r2, #0x30000\n\t"
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"orr r3, r3, #0x30000\n\t"
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"mcr p15, 0, r0, c2, c0, 0\n\t" //write data cacheable bit
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"mcr p15, 0, r4, c2, c0, 1\n\t" //write inst cacheable bit
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"mcr p15, 0, r1, c3, c0, 0\n\t" //write data writeable
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"mcr p15, 0, r2, c5, c0, 2\n\t" //write data access permission
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"mcr p15, 0, r3, c5, c0, 3\n\t" //write inst access permission
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::: "r0", "r1", "r2", "r3", "r4"
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);
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//Copy firm partitions to respective memory locations
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memcpy(section[0].address, (u8*)firmLocation + section[0].offset, section[0].size);
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memcpy(section[1].address, (u8*)firmLocation + section[1].offset, section[1].size);
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memcpy(section[2].address, (u8*)firmLocation + section[2].offset, section[2].size);
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*(u32 *)0x1FFFFFF8 = (u32)firmLocation->arm11Entry;
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//Final jump to arm9 binary
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((void (*)())0x801B01C)();
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} |