21db0d45bd
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37 lines
849 B
ArmAsm
37 lines
849 B
ArmAsm
.arm.little
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.create "build/mmuHook.bin", 0
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.arm
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; r2 = L1 table
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; Thanks @Dazzozo for giving me that idea
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; Maps physmem so that, if addr is in physmem(0, 0x30000000), it can be accessed uncached&rwx as addr|(1<<31)
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; Save the value of all registers
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push {r0-r1, r3-r7}
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mov r0, #0
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mov r1, #0x30000000 ; end address
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ldr r3, =#0x40C02 ; supersection (rwx for all) of strongly ordered memory, shared
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loop:
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orr r4, r0, #0x80000000
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orr r5, r0, r3
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mov r6, #0 ;
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loop2:
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add r7, r6, r4,lsr #20
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str r5, [r2, r7,lsl #2]
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add r6, #1
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cmp r6, #16
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blo loop2
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add r0, #0x01000000
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cmp r0, r1
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blo loop
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pop {r0-r1, r3-r7}
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mov r3, #0xe0000000 ; instruction that has been patched
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bx lr
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.pool
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.close
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