619 lines
18 KiB
C
619 lines
18 KiB
C
/*
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* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this file,
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* You can obtain one at http://mozilla.org/MPL/2.0/.
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*
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* Copyright (c) 2014-2015, Normmatt
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*
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* Alternatively, the contents of this file may be used under the terms
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* of the GNU General Public License Version 2, as described below:
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*
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* This file is free software: you may copy, redistribute and/or modify
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* it under the terms of the GNU General Public License as published by the
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* Free Software Foundation, either version 2 of the License, or (at your
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* option) any later version.
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
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* Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see http://www.gnu.org/licenses/.
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*/
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#include <stdint.h>
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#include <stdbool.h>
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#include "wait_cycles.h"
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#include "sdmmc.h"
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#define DATA32_SUPPORT
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struct mmcdevice handleNAND;
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struct mmcdevice handleSD;
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mmcdevice *getMMCDevice(int drive)
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{
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if(drive==0) return &handleNAND;
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return &handleSD;
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}
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static int get_error(struct mmcdevice *ctx)
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{
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return (int)((ctx->error << 29) >> 31);
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}
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static void set_target(struct mmcdevice *ctx)
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{
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sdmmc_mask16(REG_SDPORTSEL,0x3,(u16)ctx->devicenumber);
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setckl(ctx->clk);
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if(ctx->SDOPT == 0)
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{
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sdmmc_mask16(REG_SDOPT,0,0x8000);
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}
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else
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{
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sdmmc_mask16(REG_SDOPT,0x8000,0);
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}
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}
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static void sdmmc_send_command(struct mmcdevice *ctx, u32 cmd, u32 args)
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{
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const bool getSDRESP = (cmd << 15) >> 31;
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u16 flags = (cmd << 15) >> 31;
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const bool readdata = cmd & 0x20000;
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const bool writedata = cmd & 0x40000;
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if(readdata || writedata)
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{
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flags |= TMIO_STAT0_DATAEND;
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}
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ctx->error = 0;
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while((sdmmc_read16(REG_SDSTATUS1) & TMIO_STAT1_CMD_BUSY)); //mmc working?
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sdmmc_write16(REG_SDIRMASK0,0);
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sdmmc_write16(REG_SDIRMASK1,0);
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sdmmc_write16(REG_SDSTATUS0,0);
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sdmmc_write16(REG_SDSTATUS1,0);
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sdmmc_mask16(REG_DATACTL32,0x1800,0x400); // Disable TX32RQ and RX32RDY IRQ. Clear fifo.
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sdmmc_write16(REG_SDCMDARG0,args &0xFFFF);
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sdmmc_write16(REG_SDCMDARG1,args >> 16);
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sdmmc_write16(REG_SDCMD,cmd &0xFFFF);
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u32 size = ctx->size;
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const u16 blkSize = sdmmc_read16(REG_SDBLKLEN32);
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u32 *rDataPtr32 = (u32*)(void*)ctx->rData;
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u8 *rDataPtr8 = ctx->rData;
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const u32 *tDataPtr32 = (u32*)(void*)ctx->tData;
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const u8 *tDataPtr8 = ctx->tData;
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bool rUseBuf = ( NULL != rDataPtr32 );
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bool tUseBuf = ( NULL != tDataPtr32 );
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u16 status0 = 0;
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while(1)
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{
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volatile u16 status1 = sdmmc_read16(REG_SDSTATUS1);
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#ifdef DATA32_SUPPORT
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volatile u16 ctl32 = sdmmc_read16(REG_DATACTL32);
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if((ctl32 & 0x100))
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#else
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if((status1 & TMIO_STAT1_RXRDY))
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#endif
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{
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if(readdata)
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{
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if(rUseBuf)
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{
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sdmmc_mask16(REG_SDSTATUS1, TMIO_STAT1_RXRDY, 0);
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if(size >= blkSize)
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{
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#ifdef DATA32_SUPPORT
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if(!((u32)rDataPtr32 & 3))
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{
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for(u32 i = 0; i < blkSize; i += 4)
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{
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*rDataPtr32++ = sdmmc_read32(REG_SDFIFO32);
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}
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}
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else
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{
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for(u32 i = 0; i < blkSize; i += 4)
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{
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u32 data = sdmmc_read32(REG_SDFIFO32);
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*rDataPtr8++ = data;
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*rDataPtr8++ = data >> 8;
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*rDataPtr8++ = data >> 16;
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*rDataPtr8++ = data >> 24;
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}
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}
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#else
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if(!((u32)rDataPtr16 & 1))
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{
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for(u32 i = 0; i < blkSize; i += 4)
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{
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*rDataPtr16++ = sdmmc_read16(REG_SDFIFO);
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}
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}
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else
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{
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for(u32 i = 0; i < blkSize; i += 4)
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{
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u16 data = sdmmc_read16(REG_SDFIFO);
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*rDataPtr8++ = data;
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*rDataPtr8++ = data >> 8;
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}
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}
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#endif
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size -= blkSize;
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}
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}
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sdmmc_mask16(REG_DATACTL32, 0x800, 0);
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}
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}
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#ifdef DATA32_SUPPORT
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if(!(ctl32 & 0x200))
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#else
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if((status1 & TMIO_STAT1_TXRQ))
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#endif
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{
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if(writedata)
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{
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if(tUseBuf)
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{
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sdmmc_mask16(REG_SDSTATUS1, TMIO_STAT1_TXRQ, 0);
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if(size >= blkSize)
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{
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#ifdef DATA32_SUPPORT
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if(!((u32)tDataPtr32 & 3))
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{
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for(u32 i = 0; i < blkSize; i += 4)
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{
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sdmmc_write32(REG_SDFIFO32, *tDataPtr32++);
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}
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}
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else
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{
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for(u32 i = 0; i < blkSize; i += 4)
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{
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u32 data = *tDataPtr8++;
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data |= (u32)*tDataPtr8++ << 8;
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data |= (u32)*tDataPtr8++ << 16;
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data |= (u32)*tDataPtr8++ << 24;
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sdmmc_write32(REG_SDFIFO32, data);
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}
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}
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#else
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if(!((u32)tDataPtr16 & 1))
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{
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for(u32 i = 0; i < blkSize; i += 2)
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{
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sdmmc_write16(REG_SDFIFO, *tDataPtr16++);
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}
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}
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else
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{
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for(u32 i = 0; i < blkSize; i += 2)
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{
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u16 data = *tDataPtr8++;
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data |= (u16)(*tDataPtr8++ << 8);
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sdmmc_write16(REG_SDFIFO, data);
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}
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}
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#endif
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size -= blkSize;
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}
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}
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sdmmc_mask16(REG_DATACTL32, 0x1000, 0);
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}
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}
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if(status1 & TMIO_MASK_GW)
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{
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ctx->error |= 4;
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break;
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}
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if(!(status1 & TMIO_STAT1_CMD_BUSY))
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{
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status0 = sdmmc_read16(REG_SDSTATUS0);
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if(sdmmc_read16(REG_SDSTATUS0) & TMIO_STAT0_CMDRESPEND)
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{
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ctx->error |= 0x1;
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}
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if(status0 & TMIO_STAT0_DATAEND)
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{
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ctx->error |= 0x2;
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}
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if((status0 & flags) == flags)
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break;
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}
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}
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ctx->stat0 = sdmmc_read16(REG_SDSTATUS0);
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ctx->stat1 = sdmmc_read16(REG_SDSTATUS1);
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sdmmc_write16(REG_SDSTATUS0,0);
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sdmmc_write16(REG_SDSTATUS1,0);
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if(getSDRESP != 0)
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{
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ctx->ret[0] = (u32)(sdmmc_read16(REG_SDRESP0) | (sdmmc_read16(REG_SDRESP1) << 16));
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ctx->ret[1] = (u32)(sdmmc_read16(REG_SDRESP2) | (sdmmc_read16(REG_SDRESP3) << 16));
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ctx->ret[2] = (u32)(sdmmc_read16(REG_SDRESP4) | (sdmmc_read16(REG_SDRESP5) << 16));
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ctx->ret[3] = (u32)(sdmmc_read16(REG_SDRESP6) | (sdmmc_read16(REG_SDRESP7) << 16));
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}
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}
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int sdmmc_sdcard_writesectors(u32 sector_no, u32 numsectors, const u8 *in)
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{
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if(handleSD.isSDHC == 0) sector_no <<= 9;
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set_target(&handleSD);
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sdmmc_write16(REG_SDSTOP,0x100);
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#ifdef DATA32_SUPPORT
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sdmmc_write16(REG_SDBLKCOUNT32,numsectors);
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sdmmc_write16(REG_SDBLKLEN32,0x200);
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#endif
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sdmmc_write16(REG_SDBLKCOUNT,numsectors);
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handleSD.tData = in;
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handleSD.size = numsectors << 9;
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sdmmc_send_command(&handleSD,0x52C19,sector_no);
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return get_error(&handleSD);
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}
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int sdmmc_sdcard_readsectors(u32 sector_no, u32 numsectors, u8 *out)
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{
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if(handleSD.isSDHC == 0) sector_no <<= 9;
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set_target(&handleSD);
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sdmmc_write16(REG_SDSTOP,0x100);
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#ifdef DATA32_SUPPORT
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sdmmc_write16(REG_SDBLKCOUNT32,numsectors);
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sdmmc_write16(REG_SDBLKLEN32,0x200);
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#endif
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sdmmc_write16(REG_SDBLKCOUNT,numsectors);
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handleSD.rData = out;
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handleSD.size = numsectors << 9;
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sdmmc_send_command(&handleSD,0x33C12,sector_no);
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return get_error(&handleSD);
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}
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int sdmmc_nand_readsectors(u32 sector_no, u32 numsectors, u8 *out)
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{
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if(handleNAND.isSDHC == 0) sector_no <<= 9;
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set_target(&handleNAND);
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sdmmc_write16(REG_SDSTOP,0x100);
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#ifdef DATA32_SUPPORT
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sdmmc_write16(REG_SDBLKCOUNT32,numsectors);
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sdmmc_write16(REG_SDBLKLEN32,0x200);
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#endif
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sdmmc_write16(REG_SDBLKCOUNT,numsectors);
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handleNAND.rData = out;
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handleNAND.size = numsectors << 9;
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sdmmc_send_command(&handleNAND,0x33C12,sector_no);
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return get_error(&handleNAND);
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}
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int sdmmc_nand_writesectors(u32 sector_no, u32 numsectors, const u8 *in) //experimental
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{
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if(handleNAND.isSDHC == 0) sector_no <<= 9;
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set_target(&handleNAND);
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sdmmc_write16(REG_SDSTOP,0x100);
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#ifdef DATA32_SUPPORT
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sdmmc_write16(REG_SDBLKCOUNT32,numsectors);
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sdmmc_write16(REG_SDBLKLEN32,0x200);
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#endif
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sdmmc_write16(REG_SDBLKCOUNT,numsectors);
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handleNAND.tData = in;
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handleNAND.size = numsectors << 9;
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sdmmc_send_command(&handleNAND,0x52C19,sector_no);
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return get_error(&handleNAND);
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}
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static u32 sdmmc_calc_size(u8* csd, int type)
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{
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u32 result = 0;
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if(type == -1) type = csd[14] >> 6;
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switch(type)
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{
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case 0:
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{
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u32 block_len=csd[9]&0xf;
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block_len=1u<<block_len;
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u32 mult=( u32)((csd[4]>>7)|((csd[5]&3)<<1));
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mult=1u<<(mult+2);
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result=csd[8]&3;
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result=(result<<8)|csd[7];
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result=(result<<2)|(csd[6]>>6);
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result=(result+1)*mult*block_len/512;
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}
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break;
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case 1:
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result=csd[7]&0x3f;
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result=(result<<8)|csd[6];
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result=(result<<8)|csd[5];
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result=(result+1)*1024;
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break;
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default:
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break; //Do nothing otherwise FIXME perhaps return some error?
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}
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return result;
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}
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void sdmmc_init()
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{
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//NAND
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handleNAND.isSDHC = 0;
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handleNAND.SDOPT = 0;
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handleNAND.res = 0;
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handleNAND.initarg = 1;
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handleNAND.clk = 0x20; // 523.655968 KHz
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handleNAND.devicenumber = 1;
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//SD
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handleSD.isSDHC = 0;
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handleSD.SDOPT = 0;
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handleSD.res = 0;
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handleSD.initarg = 0;
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handleSD.clk = 0x20; // 523.655968 KHz
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handleSD.devicenumber = 0;
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*(vu16*)0x10006100 &= 0xF7FFu; //SDDATACTL32
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*(vu16*)0x10006100 &= 0xEFFFu; //SDDATACTL32
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#ifdef DATA32_SUPPORT
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*(vu16*)0x10006100 |= 0x402u; //SDDATACTL32
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#else
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*(vu16*)0x10006100 |= 0x402u; //SDDATACTL32
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#endif
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*(vu16*)0x100060D8 = (*(vu16*)0x100060D8 & 0xFFDD) | 2;
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#ifdef DATA32_SUPPORT
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*(vu16*)0x10006100 &= 0xFFFFu; //SDDATACTL32
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*(vu16*)0x100060D8 &= 0xFFDFu; //SDDATACTL
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*(vu16*)0x10006104 = 512; //SDBLKLEN32
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#else
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*(vu16*)0x10006100 &= 0xFFFDu; //SDDATACTL32
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*(vu16*)0x100060D8 &= 0xFFDDu; //SDDATACTL
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*(vu16*)0x10006104 = 0; //SDBLKLEN32
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#endif
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*(vu16*)0x10006108 = 1; //SDBLKCOUNT32
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*(vu16*)0x100060E0 &= 0xFFFEu; //SDRESET
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*(vu16*)0x100060E0 |= 1u; //SDRESET
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*(vu16*)0x10006020 |= TMIO_MASK_ALL; //SDIR_MASK0
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*(vu16*)0x10006022 |= TMIO_MASK_ALL>>16; //SDIR_MASK1
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*(vu16*)0x100060FC |= 0xDBu; //SDCTL_RESERVED7
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*(vu16*)0x100060FE |= 0xDBu; //SDCTL_RESERVED8
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*(vu16*)0x10006002 &= 0xFFFCu; //SDPORTSEL
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#ifdef DATA32_SUPPORT
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*(vu16*)0x10006024 = 0x20;
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*(vu16*)0x10006028 = 0x40E9;
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#else
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*(vu16*)0x10006024 = 0x40; //Nintendo sets this to 0x20
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*(vu16*)0x10006028 = 0x40E9; //Nintendo sets this to 0x40EE
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#endif
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*(vu16*)0x10006002 &= 0xFFFCu; ////SDPORTSEL
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*(vu16*)0x10006026 = 512; //SDBLKLEN
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*(vu16*)0x10006008 = 0; //SDSTOP
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}
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int Nand_Init()
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{
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// init the handle
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handleNAND.isSDHC = 0;
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handleNAND.SDOPT = 0;
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handleNAND.res = 0;
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handleNAND.initarg = 1;
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handleNAND.clk = 0x20; // 523.655968 KHz
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handleNAND.devicenumber = 1;
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// The eMMC is always on. Nothing special to do.
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set_target(&handleNAND);
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sdmmc_send_command(&handleNAND,0,0);
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do
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{
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do
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{
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sdmmc_send_command(&handleNAND,0x10701,0x100000);
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} while ( !(handleNAND.error & 1) );
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}
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while((handleNAND.ret[0] & 0x80000000) == 0);
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sdmmc_send_command(&handleNAND,0x10602,0x0);
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if((handleNAND.error & 0x4))return -1;
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sdmmc_send_command(&handleNAND,0x10403,handleNAND.initarg << 0x10);
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if((handleNAND.error & 0x4))return -1;
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sdmmc_send_command(&handleNAND,0x10609,handleNAND.initarg << 0x10);
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if((handleNAND.error & 0x4))return -1;
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handleNAND.total_size = sdmmc_calc_size((u8*)&handleNAND.ret[0],0);
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setckl(0x201); // 16.756991 MHz
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sdmmc_send_command(&handleNAND,0x10407,handleNAND.initarg << 0x10);
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if((handleNAND.error & 0x4))return -1;
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handleNAND.SDOPT = 1;
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sdmmc_send_command(&handleNAND,0x10506,0x3B70100); // Set 4 bit bus width.
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if((handleNAND.error & 0x4))return -1;
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sdmmc_mask16(REG_SDOPT, 0x8000, 0); // Switch to 4 bit mode.
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sdmmc_send_command(&handleNAND,0x10506,0x3B90100); // Switch to high speed timing.
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if((handleNAND.error & 0x4))return -1;
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handleNAND.clk = 0x200; // 33.513982 MHz
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setckl(0x200);
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sdmmc_send_command(&handleNAND,0x1040D,handleNAND.initarg << 0x10);
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if((handleNAND.error & 0x4))return -1;
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sdmmc_send_command(&handleNAND,0x10410,0x200);
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if((handleNAND.error & 0x4))return -1;
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return 0;
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}
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int SD_Init()
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{
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// init the handle
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handleSD.isSDHC = 0;
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handleSD.SDOPT = 0;
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handleSD.res = 0;
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handleSD.initarg = 0;
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handleSD.clk = 0x20; // 523.655968 KHz
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handleSD.devicenumber = 0;
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// We need to send at least 74 clock pulses.
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set_target(&handleSD);
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wait_cycles(0x1980); // ~75-76 clocks
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sdmmc_send_command(&handleSD,0,0);
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sdmmc_send_command(&handleSD,0x10408,0x1AA);
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|
u32 temp = (handleSD.error & 0x1) << 0x1E;
|
|
|
|
u32 temp2 = 0;
|
|
|
|
do
|
|
{
|
|
do
|
|
{
|
|
sdmmc_send_command(&handleSD,0x10437,handleSD.initarg << 0x10);
|
|
sdmmc_send_command(&handleSD,0x10769,0x10100000 | temp); // Allow 150mA, 3.2-3.3V (from Process9)
|
|
temp2 = 1;
|
|
} while ( !(handleSD.error & 1) );
|
|
}
|
|
while((handleSD.ret[0] & 0x80000000) == 0);
|
|
|
|
if(!((handleSD.ret[0] >> 30) & 1) || !temp)
|
|
temp2 = 0;
|
|
|
|
handleSD.isSDHC = temp2;
|
|
|
|
sdmmc_send_command(&handleSD,0x10602,0);
|
|
if((handleSD.error & 0x4)) return -1;
|
|
|
|
sdmmc_send_command(&handleSD,0x10403,0);
|
|
if((handleSD.error & 0x4)) return -2;
|
|
handleSD.initarg = handleSD.ret[0] >> 0x10;
|
|
|
|
sdmmc_send_command(&handleSD,0x10609,handleSD.initarg << 0x10);
|
|
if((handleSD.error & 0x4)) return -3;
|
|
|
|
// Command Class 10 support
|
|
const bool cmd6Supported = ((u8*)handleSD.ret)[10] & 0x40;
|
|
handleSD.total_size = sdmmc_calc_size((u8*)&handleSD.ret[0],-1);
|
|
setckl(0x201); // 16.756991 MHz
|
|
|
|
sdmmc_send_command(&handleSD,0x10507,handleSD.initarg << 0x10);
|
|
if((handleSD.error & 0x4)) return -4;
|
|
|
|
// CMD55
|
|
sdmmc_send_command(&handleSD,0x10437,handleSD.initarg << 0x10);
|
|
if(handleSD.error & 0x4) return -5;
|
|
|
|
// ACMD42 SET_CLR_CARD_DETECT
|
|
sdmmc_send_command(&handleSD,0x1076A,0x0);
|
|
if(handleSD.error & 0x4) return -6;
|
|
|
|
sdmmc_send_command(&handleSD,0x10437,handleSD.initarg << 0x10);
|
|
if((handleSD.error & 0x4)) return -7;
|
|
|
|
handleSD.SDOPT = 1;
|
|
sdmmc_send_command(&handleSD,0x10446,0x2);
|
|
if((handleSD.error & 0x4)) return -8;
|
|
sdmmc_mask16(REG_SDOPT, 0x8000, 0); // Switch to 4 bit mode.
|
|
|
|
// TODO: CMD6 to switch to high speed mode.
|
|
if(cmd6Supported)
|
|
{
|
|
sdmmc_write16(REG_SDSTOP,0);
|
|
sdmmc_write16(REG_SDBLKLEN32,64);
|
|
sdmmc_write16(REG_SDBLKLEN,64);
|
|
handleSD.rData = NULL;
|
|
handleSD.size = 64;
|
|
sdmmc_send_command(&handleSD,0x31C06,0x80FFFFF1);
|
|
sdmmc_write16(REG_SDBLKLEN,512);
|
|
if(handleSD.error & 0x4) return -9;
|
|
|
|
handleSD.clk = 0x200; // 33.513982 MHz
|
|
setckl(0x200);
|
|
}
|
|
else handleSD.clk = 0x201; // 16.756991 MHz
|
|
|
|
sdmmc_send_command(&handleSD,0x1040D,handleSD.initarg << 0x10);
|
|
if((handleSD.error & 0x4)) return -9;
|
|
|
|
sdmmc_send_command(&handleSD,0x10410,0x200);
|
|
if((handleSD.error & 0x4)) return -10;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int sdmmc_get_cid(bool isNand, u32 *info)
|
|
{
|
|
struct mmcdevice *device;
|
|
if(isNand)
|
|
device = &handleNAND;
|
|
else
|
|
device = &handleSD;
|
|
|
|
set_target(device);
|
|
// use cmd7 to put sd card in standby mode
|
|
// CMD7
|
|
{
|
|
sdmmc_send_command(device,0x10507,0);
|
|
//if((device->error & 0x4)) return -1;
|
|
}
|
|
|
|
// get sd card info
|
|
// use cmd10 to read CID
|
|
{
|
|
sdmmc_send_command(device,0x1060A,device->initarg << 0x10);
|
|
//if((device->error & 0x4)) return -2;
|
|
|
|
for( int i = 0; i < 4; ++i ) {
|
|
info[i] = device->ret[i];
|
|
}
|
|
}
|
|
|
|
// put sd card back to transfer mode
|
|
// CMD7
|
|
{
|
|
sdmmc_send_command(device,0x10507,device->initarg << 0x10);
|
|
//if((device->error & 0x4)) return -3;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
u32 sdmmc_sdcard_init()
|
|
{
|
|
u32 ret = 0;
|
|
|
|
// SD mount fix
|
|
*((vu16*)0x10000020) = 0x340;
|
|
|
|
// init SDMMC / NAND
|
|
sdmmc_init();
|
|
if(Nand_Init() != 0) ret &= 1;
|
|
|
|
// init SDMMC / SDCARD
|
|
u32 timeout = 20; // number of tries (2ms per try)
|
|
|
|
do {
|
|
// if sd card is ready, stop polling
|
|
if(sdmmc_read16(REG_SDSTATUS0) & TMIO_STAT0_SIGSTATE)
|
|
break;
|
|
|
|
wait_cycles(268000000); // approx 2ms
|
|
timeout--;
|
|
} while(timeout);
|
|
|
|
if(!timeout || SD_Init() != 0) ret &= 2;
|
|
|
|
return ret;
|
|
}
|