120 lines
3.5 KiB
C
120 lines
3.5 KiB
C
/*
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* This file is part of Luma3DS
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* Copyright (C) 2016-2020 Aurora Wright, TuxSH
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Additional Terms 7.b and 7.c of GPLv3 apply to this file:
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* * Requiring preservation of specified reasonable legal notices or
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* author attributions in that material or in the Appropriate Legal
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* Notices displayed by works containing it.
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* * Prohibiting misrepresentation of the origin of that material,
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* or requiring that modified versions of such material be marked in
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* reasonable ways as different from the original version.
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*/
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#pragma once
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#include "types.h"
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#include "kernel.h"
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typedef KSchedulableInterruptEvent* (*SGI0Handler_t)(KBaseInterruptEvent *this, u32 interruptID);
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// http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/CCHDIFIJ.html
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void executeFunctionOnCores(SGI0Handler_t func, u8 targetList, u8 targetListFilter);
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void KScheduler__TriggerCrossCoreInterrupt(KScheduler *this);
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void KThread__DebugReschedule(KThread *this, bool lock);
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bool rosalinaThreadLockPredicate(KThread *thread);
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void rosalinaRescheduleThread(KThread *thread, bool lock);
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void rosalinaLockThread(KThread *thread);
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void rosalinaLockAllThreads(void);
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void rosalinaUnlockAllThreads(void);
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// Taken from ctrulib:
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static inline void __dsb(void)
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{
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__asm__ __volatile__("mcr p15, 0, %[val], c7, c10, 4" :: [val] "r" (0) : "memory");
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}
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static inline void __clrex(void)
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{
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__asm__ __volatile__("clrex" ::: "memory");
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}
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static inline s32 __ldrex(s32* addr)
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{
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s32 val;
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__asm__ __volatile__("ldrex %[val], %[addr]" : [val] "=r" (val) : [addr] "Q" (*addr));
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return val;
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}
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static inline bool __strex(s32* addr, s32 val)
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{
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bool res;
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__asm__ __volatile__("strex %[res], %[val], %[addr]" : [res] "=&r" (res) : [val] "r" (val), [addr] "Q" (*addr));
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return res;
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}
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static inline s8 __ldrex8(s8* addr)
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{
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s8 val;
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__asm__ __volatile__("ldrexb %[val], %[addr]" : [val] "=r" (val) : [addr] "Q" (*addr));
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return val;
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}
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static inline bool __strex8(s8* addr, s8 val)
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{
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bool res;
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__asm__ __volatile__("strexb %[res], %[val], %[addr]" : [res] "=&r" (res) : [val] "r" (val), [addr] "Q" (*addr));
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return res;
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}
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static inline s16 __ldrex16(s16* addr)
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{
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s16 val;
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__asm__ __volatile__("ldrexh %[val], %[addr]" : [val] "=r" (val) : [addr] "Q" (*addr));
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return val;
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}
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static inline bool __strex16(s16* addr, s16 val)
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{
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bool res;
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__asm__ __volatile__("strexh %[res], %[val], %[addr]" : [res] "=&r" (res) : [val] "r" (val), [addr] "Q" (*addr));
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return res;
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}
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static inline u32 __get_cpsr(void)
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{
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u32 cpsr;
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__asm__ __volatile__("mrs %0, cpsr" : "=r"(cpsr));
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return cpsr;
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}
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static inline void __set_cpsr_cx(u32 cpsr)
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{
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__asm__ __volatile__("msr cpsr_cx, %0" :: "r"(cpsr));
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}
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static inline void __enable_irq(void)
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{
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__asm__ __volatile__("cpsie i");
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}
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static inline void __disable_irq(void)
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{
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__asm__ __volatile__("cpsid i");
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}
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