86 lines
2.6 KiB
ArmAsm
86 lines
2.6 KiB
ArmAsm
@ This file is part of Luma3DS
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@ Copyright (C) 2016-2019 Aurora Wright, TuxSH
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@
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@ This program is free software: you can redistribute it and/or modify
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@ it under the terms of the GNU General Public License as published by
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@ the Free Software Foundation, either version 3 of the License, or
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@ (at your option) any later version.
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@
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@ This program is distributed in the hope that it will be useful,
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@ but WITHOUT ANY WARRANTY; without even the implied warranty of
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@ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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@ GNU General Public License for more details.
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@
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@ You should have received a copy of the GNU General Public License
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@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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@
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@ Additional Terms 7.b and 7.c of GPLv3 apply to this file:
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@ * Requiring preservation of specified reasonable legal notices or
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@ author attributions in that material or in the Appropriate Legal
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@ Notices displayed by works containing it.
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@ * Prohibiting misrepresentation of the origin of that material,
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@ or requiring that modified versions of such material be marked in
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@ reasonable ways as different from the original version.
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.section .text.start, "ax", %progbits
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.align 4
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.global _start
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.type _start, %function
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_start:
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b start
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.global operation
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operation:
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.word 0
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start:
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@ Disable interrupts and switch to supervisor mode
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cpsid aif, #0x13
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@ Set the control register to reset default: everything disabled
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ldr r0, =0x54078
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mcr p15, 0, r0, c1, c0, 0
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@ Set the auxiliary control register to reset default.
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@ Enables instruction folding, static branch prediction,
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@ dynamic branch prediction, and return stack.
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mov r0, #0xF
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mcr p15, 0, r0, c1, c0, 1
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@ Invalidate both caches, flush the prefetch buffer then DSB
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mov r0, #0
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mcr p15, 0, r0, c7, c5, 4
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mcr p15, 0, r0, c7, c7, 0
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mcr p15, 0, r0, c7, c10, 4
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@ Clear BSS
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ldr r0, =__bss_start__
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mov r1, #0
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ldr r2, =__bss_end__
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sub r2, r0
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bl memset
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@ Call the init array
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bl __libc_init_array
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ldr sp, =__stack_top__
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mov fp, #0
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b main
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.global prepareForFirmlaunch
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.type prepareForFirmlaunch, %function
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prepareForFirmlaunch:
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str r0, [r1] @ tell ARM9 we're done
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mov r0, #0x20000000
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_wait_for_core0_entrypoint_loop:
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ldr r1, [r0, #-4] @ check if core0's entrypoint is 0
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cmp r1, #0
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beq _wait_for_core0_entrypoint_loop
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bx r1 @ jump to core0's entrypoint
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prepareForFirmlaunchEnd:
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.global prepareForFirmlaunchSize
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prepareForFirmlaunchSize: .word prepareForFirmlaunchEnd - prepareForFirmlaunch
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