21db0d45bd
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61 lines
2.0 KiB
ArmAsm
61 lines
2.0 KiB
ArmAsm
@ This file is part of Luma3DS
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@ Copyright (C) 2016-2017 Aurora Wright, TuxSH
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@
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@ This program is free software: you can redistribute it and/or modify
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@ it under the terms of the GNU General Public License as published by
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@ the Free Software Foundation, either version 3 of the License, or
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@ (at your option) any later version.
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@
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@ This program is distributed in the hope that it will be useful,
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@ but WITHOUT ANY WARRANTY; without even the implied warranty of
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@ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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@ GNU General Public License for more details.
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@
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@ You should have received a copy of the GNU General Public License
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@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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@
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@ Additional Terms 7.b and 7.c of GPLv3 apply to this file:
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@ * Requiring preservation of specified reasonable legal notices or
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@ author attributions in that material or in the Appropriate Legal
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@ Notices displayed by works containing it.
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@ * Prohibiting misrepresentation of the origin of that material,
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@ or requiring that modified versions of such material be marked in
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@ reasonable ways as different from the original version.
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.arm
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.section .text.start
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.align 4
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.global _start
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_start:
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ldr sp, =__stack_top__
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b main
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.text
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.balign 4
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.global disableMpuAndJumpToEntrypoints
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.type disableMpuAndJumpToEntrypoints, %function
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disableMpuAndJumpToEntrypoints:
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mov r4, r0
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mov r5, r1
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mov r6, r2
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mov r7, r3
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bl flushCaches
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@ Disable caches / MPU
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mrc p15, 0, r0, c1, c0, 0 @ read control register
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bic r0, #(1<<12) @ - instruction cache disable
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bic r0, #(1<<2) @ - data cache disable
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bic r0, #(1<<0) @ - MPU disable
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mcr p15, 0, r0, c1, c0, 0 @ write control register
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@ Set the ARM11 entrypoint
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mov r0, #0x20000000
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str r7, [r0, #-4]
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@ Jump to the ARM9 entrypoint
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mov r0, r4
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mov r1, r5
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ldr r2, =0x1BEEF
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bx r6
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