Minor stuff

This commit is contained in:
Aurora 2016-09-23 18:59:44 +02:00
parent 1a5d953a98
commit fb274538e1
7 changed files with 26 additions and 30 deletions

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@ -15,7 +15,7 @@
/ and optional writing functions as well. */
#define _FS_MINIMIZE 1
#define _FS_MINIMIZE 3
/* This option defines minimization level to remove some basic API functions.
/
/ 0: All basic functions are enabled.

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@ -4,15 +4,13 @@
.global waitcycles
.type waitcycles, %function
@waitcycles ( u32 us )
waitcycles:
PUSH {R0-R2,LR}
STR R0, [SP,#4]
push {r0-r2, lr}
str r0, [sp, #4]
waitcycles_loop:
LDR R3, [SP,#4]
SUBS R2, R3, #1
STR R2, [SP,#4]
CMP R3, #0
BNE waitcycles_loop
POP {R0-R2,PC}
ldr r3, [sp, #4]
subs r2, r3, #1
str r2, [sp, #4]
cmp r3, #0
bne waitcycles_loop
pop {r0-r2, pc}

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@ -11,13 +11,13 @@ void memcpy(void *dest, const void *src, u32 size)
int memcmp(const void *buf1, const void *buf2, u32 size)
{
const u8 *buf1c = (const u8 *)buf1;
const u8 *buf2c = (const u8 *)buf2;
const u8 *buf1c = (const u8 *)buf1,
*buf2c = (const u8 *)buf2;
for(u32 i = 0; i < size; i++)
{
int cmp = buf1c[i] - buf2c[i];
if(cmp) return cmp;
if(cmp != 0) return cmp;
}
return 0;

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@ -18,10 +18,12 @@
@ reasonable legal notices or author attributions in that material or in the Appropriate Legal
@ Notices displayed by works containing it.
.text
.arm
.global flushCaches
.type flushCaches STT_FUNC
.align 4
.global flushCaches
.type flushCaches, %function
flushCaches:
@ Clean and flush data cache
@ Adpated from http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0155a/ch03s03s05.html ,

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@ -20,7 +20,6 @@
* Notices displayed by works containing it.
*/
/*
* memcpy adapted from https://github.com/mid-kid/CakesForeveryWan/blob/557a8e8605ab3ee173af6497486e8f22c261d0e2/source/memfuncs.c
*/

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@ -20,7 +20,6 @@
* Notices displayed by works containing it.
*/
/*
* memcpy adapted from https://github.com/mid-kid/CakesForeveryWan/blob/557a8e8605ab3ee173af6497486e8f22c261d0e2/source/memfuncs.c
*/

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@ -4,15 +4,13 @@
.global waitcycles
.type waitcycles, %function
@waitcycles ( u32 us )
waitcycles:
PUSH {R0-R2,LR}
STR R0, [SP,#4]
push {r0-r2, lr}
str r0, [sp, #4]
waitcycles_loop:
LDR R3, [SP,#4]
SUBS R2, R3, #1
STR R2, [SP,#4]
CMP R3, #0
BNE waitcycles_loop
POP {R0-R2,PC}
ldr r3, [sp, #4]
subs r2, r3, #1
str r2, [sp, #4]
cmp r3, #0
bne waitcycles_loop
pop {r0-r2, pc}