Do the same for arm9 exceptions

This commit is contained in:
TuxSH 2018-05-22 20:26:14 +02:00
parent 55bd62d7a9
commit c0bd69309a
15 changed files with 99 additions and 105 deletions

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@ -40,8 +40,6 @@ endif
dir_source := source
dir_patches := patches
dir_arm11 := arm11
dir_exceptions := exceptions
dir_arm9_exceptions := $(dir_exceptions)/arm9
dir_k11_extension := k11_extension
dir_sysmodules := sysmodules
dir_loader := $(dir_sysmodules)/loader
@ -52,14 +50,14 @@ dir_build := build
dir_out := out
ASFLAGS := -mcpu=arm946e-s
CFLAGS := -Wall -Wextra $(ASFLAGS) -fno-builtin -std=c11 -Wno-main -O2 -flto -ffast-math
CFLAGS := -Wall -Wextra $(ASFLAGS) -fno-builtin -std=c11 -Wno-main -O2 -ffast-math
LDFLAGS := -nostartfiles -Wl,--nmagic
objects = $(patsubst $(dir_source)/%.s, $(dir_build)/%.o, \
$(patsubst $(dir_source)/%.c, $(dir_build)/%.o, \
$(call rwildcard, $(dir_source), *.s *.c)))
bundled = $(dir_build)/reboot.bin.o $(dir_build)/emunand.bin.o $(dir_build)/arm9_exceptions.bin.o
bundled = $(dir_build)/reboot.bin.o $(dir_build)/emunand.bin.o
modules = $(dir_build)/loader.cxi $(dir_build)/rosalina.cxi $(dir_build)/sm.cxi $(dir_build)/pxi.cxi
@ -79,7 +77,6 @@ firm: $(dir_out)/boot.firm
.PHONY: clean
clean:
@$(MAKE) -C $(dir_arm11) clean
@$(MAKE) -C $(dir_arm9_exceptions) clean
@$(MAKE) -C $(dir_k11_extension) clean
@$(MAKE) -C $(dir_loader) clean
@$(MAKE) -C $(dir_rosalina) clean
@ -90,7 +87,6 @@ clean:
.PRECIOUS: $(dir_build)/%.bin
.PHONY: $(dir_arm11)
.PHONY: $(dir_arm9_exceptions)
.PHONY: $(dir_k11_extension)
.PHONY: $(dir_loader)
.PHONY: $(dir_rosalina)
@ -100,7 +96,7 @@ clean:
$(dir_out)/$(name)$(revision).7z: all
@mkdir -p "$(@D)"
@[ -f "$@" ] || 7z a -mx $@ ./$(@D)/* ./$(dir_exceptions)/exception_dump_parser -xr!.DS_Store
@[ -f "$@" ] || 7z a -mx $@ ./$(@D)/* ./exception_dump_parser -xr!.DS_Store
$(dir_out)/boot.firm: $(dir_build)/modules.bin $(dir_build)/arm11.elf $(dir_build)/main.elf $(dir_build)/k11_extension.bin
@mkdir -p "$(@D)"
@ -140,10 +136,6 @@ $(dir_build)/pxi.cxi: $(dir_pxi)
$(dir_build)/%.bin.o: $(dir_build)/%.bin
@$(bin2o)
$(dir_build)/arm9_exceptions.bin: $(dir_arm9_exceptions)
@mkdir -p "$(@D)"
@$(MAKE) -C $<
$(dir_build)/%.bin: $(dir_patches)/%.s
@mkdir -p "$(@D)"
@armips $<

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@ -1,42 +0,0 @@
rwildcard = $(foreach d, $(wildcard $1*), $(filter $(subst *, %, $2), $d) $(call rwildcard, $d/, $2))
ifeq ($(strip $(DEVKITARM)),)
$(error "Please set DEVKITARM in your environment. export DEVKITARM=<path to>devkitARM")
endif
include $(DEVKITARM)/base_tools
name := arm9_exceptions
dir_source := source
dir_build := build
dir_out := ../../$(dir_build)
ASFLAGS := -mcpu=arm946e-s
CFLAGS := -Wall -Wextra -marm $(ASFLAGS) -fno-builtin -std=c11 -Wno-main -Os -ffast-math
LDFLAGS := -nostartfiles -Wl,--nmagic
objects = $(patsubst $(dir_source)/%.s, $(dir_build)/%.o, \
$(patsubst $(dir_source)/%.c, $(dir_build)/%.o, \
$(call rwildcard, $(dir_source), *.s *.c)))
.PHONY: all
all: $(dir_out)/$(name).bin
.PHONY: clean
clean:
@rm -rf $(dir_build)
$(dir_out)/$(name).bin: $(dir_build)/$(name).elf
$(OBJCOPY) -S -O binary $< $@
$(dir_build)/$(name).elf: $(objects)
$(CC) $(LDFLAGS) -T linker.ld $(OUTPUT_OPTION) $^
$(dir_build)/%.o: $(dir_source)/%.c
@mkdir -p "$(@D)"
$(COMPILE.c) $(OUTPUT_OPTION) $<
$(dir_build)/%.o: $(dir_source)/%.s
@mkdir -p "$(@D)"
$(COMPILE.s) $(OUTPUT_OPTION) $<

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@ -1,14 +0,0 @@
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x01FF8000;
.text : ALIGN(4) { *(.text.start) *(.text*); . = ALIGN(4); }
.rodata : ALIGN(4) { *(.rodata*); . = ALIGN(4); }
.data : ALIGN(4) { *(.data*); . = ALIGN(8); *(.bss* COMMON); . = ALIGN(8); }
. = ALIGN(4);
}

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@ -16,6 +16,9 @@ SECTIONS
PROVIDE(__stack_top__ = 0x08100000);
PROVIDE(__stack_bottom__ = 0x080F0000);
PROVIDE(__itcm_stack_top__ = 0x01FFB800);
PROVIDE(__itcm_stack_bottom__ = 0x01FFA800);
. = __start__;
. = ALIGN(32);
@ -30,25 +33,31 @@ SECTIONS
.itcm_loadable :
{
. = ALIGN(32);
PROVIDE (__itcm_start__ = .);
PROVIDE (__itcm_start__ = ABSOLUTE(.));
PROVIDE (__itcm_lma__ = LOADADDR(.itcm_loadable));
PROVIDE(__itcm_stack_top__ = 0x01FFB800);
PROVIDE(__itcm_stack_bottom__ = 0x01FFA800);
KEEP(*(.arm9_exception_handlers.text))
*(.arm9_exception_handlers.text*)
KEEP(*(.chainloader.text.start))
build/chainloader.o(.text*)
build/chainloader.o(.rodata*)
build/chainloader.o(.data*)
build/chainloader.o build/i2c.o build/arm9_exception_handlers.o(.text*)
*(.arm9_exception_handlers.rodata*)
build/chainloader.o build/i2c.o build/arm9_exception_handlers.o(.rodata*)
*(.arm9_exception_handlers.data*)
build/chainloader.o build/i2c.o build/arm9_exception_handlers.o(.data*)
. = ALIGN(8);
} >itcm AT>main
.itcm_bss :
{
. = ALIGN(8);
PROVIDE (__itcm_bss_start__ = .);
build/chainloader.o(.bss* COMMON)
PROVIDE (__itcm_bss_start__ = ABSOLUTE(.));
*(.arm9_exception_handlers.bss*)
build/chainloader.o build/i2c.o build/arm9_exception_handlers.o(.bss* COMMON)
. = ALIGN(8);
PROVIDE (__itcm_end__ = .);
PROVIDE (__itcm_end__ = ABSOLUTE(.));
} >itcm AT>main
.text :

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@ -24,15 +24,16 @@
* reasonable ways as different from the original version.
*/
#include "arm9_exception_handlers.h"
#include "i2c.h"
#include "handlers.h"
#include "screen.h"
#define FINAL_BUFFER 0x25000000
#define REG_DUMP_SIZE 4 * 17
#define CODE_DUMP_SIZE 48
void __attribute__((noreturn)) mainHandler(u32 *registerDump, u32 type)
void __attribute__((noreturn)) arm9ExceptionHandlerMain(u32 *registerDump, u32 type)
{
ExceptionDumpHeader dumpHeader;
@ -73,10 +74,18 @@ void __attribute__((noreturn)) mainHandler(u32 *registerDump, u32 type)
//Copy header (actually optimized by the compiler)
*(ExceptionDumpHeader *)FINAL_BUFFER = dumpHeader;
<<<<<<< HEAD:exceptions/arm9/source/mainHandler.c
if(ARESCREENSINITIALIZED) I2C_writeReg(I2C_DEV_MCU, 0x22, 1 << 0); //Shutdown LCD
((void (*)())0xFFFF0830)(); //Ensure that all memory transfers have completed and that the data cache has been flushed
I2C_writeReg(I2C_DEV_MCU, 0x20, 1 << 2); //Reboot
=======
if(ARESCREENSINITIALIZED) i2cWriteRegisterNoWait(I2C_DEV_MCU, 0x22, 1 << 0); //Shutdown LCD
((void (*)())0xFFFF0830)(); //Ensure that all memory transfers have completed and that the data cache has been flushed
i2cWriteRegisterNoWait(I2C_DEV_MCU, 0x20, 1 << 2); //Reboot
>>>>>>> Do the same for arm9 exceptions:source/arm9_exception_handlers.c
while(true);
}

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@ -24,12 +24,12 @@
* reasonable ways as different from the original version.
*/
#pragma once
#include "types.h"
#include <stdint.h>
#include <stdlib.h>
#include <stdbool.h>
extern const u32 arm9ExceptionHandlerAddressTable[6];
extern u32 arm9ExceptionHandlerSvcBreakAddress;
<<<<<<< HEAD:exceptions/arm9/source/types.h
//Common data types
typedef uint8_t u8;
typedef uint16_t u16;
@ -43,3 +43,6 @@ typedef volatile u64 vu64;
#define PDN_GPU_CNT (*(vu32 *)0x10141200)
#define ARESCREENSINITIALIZED ((PDN_GPU_CNT & 0xFF) != 1)
=======
u32 safecpy(void *dst, const void *src, u32 len);
>>>>>>> Do the same for arm9 exceptions:source/arm9_exception_handlers.h

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@ -28,16 +28,16 @@
stmia sp, {r0-r7}
mov r0, #\index
b _commonHandler
b _arm9ExceptionHandlerCommon
.endm
.text
.section .arm9_exception_handlers.text, "ax", %progbits
.arm
.balign 4
.align 4
.global _commonHandler
.type _commonHandler, %function
_commonHandler:
.global _arm9ExceptionHandlerCommon
.type _arm9ExceptionHandlerCommon, %function
_arm9ExceptionHandlerCommon:
mov r1, r0
mov r0, sp
mrs r2, spsr
@ -60,7 +60,7 @@ _commonHandler:
msr cpsr_cxsf, #0xdf @ finally, switch to system mode, mask interrupts and clear flags (in case of double faults)
ldr sp, =0x02000000
b mainHandler
b arm9ExceptionHandlerMain
.global FIQHandler
@ -80,7 +80,7 @@ prefetchAbortHandler:
cmp sp, #0x13
bne _prefetchAbortNormalHandler
ldr sp, =BreakPtr
ldr sp, =arm9ExceptionHandlerSvcBreakAddress
ldr sp, [sp]
cmp sp, #0
beq _prefetchAbortNormalHandler
@ -147,6 +147,22 @@ safecpy:
_safecpy_end:
.bss
.balign 4
.section .arm9_exception_handlers.rodata, "a", %progbits
.align 4
.global arm9ExceptionHandlerAddressTable
arm9ExceptionHandlerAddressTable:
.word 0 @ IRQ
.word FIQHandler @ FIQ
.word 0 @ SVC
.word undefinedInstructionHandler @ Undefined instruction
.word prefetchAbortHandler @ Prefetch abort
.word dataAbortHandler @ Data abort
.section .arm9_exception_handlers.bss, "w", %nobits
.align 4
.global arm9ExceptionHandlerSvcBreakAddress
arm9ExceptionHandlerSvcBreakAddress:
.word 0
_regs: .skip (4 * 17)

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@ -33,24 +33,20 @@
#include "utils.h"
#include "fmt.h"
#include "buttons.h"
#include "../build/bundled.h"
#include "arm9_exception_handlers.h"
void installArm9Handlers(void)
{
memcpy((void *)0x01FF8000, arm9_exceptions_bin, arm9_exceptions_bin_size);
vu32 *dstVeneers = (vu32 *)0x08000000;
/* IRQHandler is at 0x08000000, but we won't handle it for some reasons
svcHandler is at 0x08000010, but we won't handle svc either */
static const u32 offsets[] = {0x08, 0x18, 0x20, 0x28};
for(u32 i = 0; i < 4; i++)
for(u32 i = 0; i < 6; i++)
{
*(vu32 *)(0x08000000 + offsets[i]) = 0xE51FF004;
*(vu32 *)(0x08000000 + offsets[i] + 4) = *(vu32 *)(0x01FF8008 + 4 * i);
if(arm9ExceptionHandlerAddressTable[i] != 0)
{
dstVeneers[2 * i] = 0xE51FF004;
dstVeneers[2 * i + 1] = arm9ExceptionHandlerAddressTable[i];
}
}
*(vu32 *)0x01FF8004 = 0; //BreakPtr
}
void detectAndProcessExceptionDumps(void)

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@ -180,7 +180,11 @@ bool I2C_readRegBuf(I2cDevice devId, u8 regAddr, u8 *out, u32 size)
return true;
}
<<<<<<< HEAD
bool I2C_writeRegBuf(I2cDevice devId, u8 regAddr, const u8 *in, u32 size)
=======
bool i2cWriteRegisterNoWait(u8 dev_id, u8 reg, u8 data)
>>>>>>> Do the same for arm9 exceptions
{
const u8 busId = i2cDevTable[devId].busId;
I2cRegs *const regs = i2cGetBusRegsBase(busId);
@ -200,6 +204,7 @@ bool I2C_writeRegBuf(I2cDevice devId, u8 regAddr, const u8 *in, u32 size)
}
}
<<<<<<< HEAD
regs->REG_I2C_DATA = *in;
regs->REG_I2C_CNT = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_DIRE_WRITE | I2C_STOP;
i2cWaitBusy(regs);
@ -218,6 +223,15 @@ u8 I2C_readReg(I2cDevice devId, u8 regAddr)
if(!I2C_readRegBuf(devId, regAddr, &data, 1)) return 0xFF;
return data;
}
=======
return ret;
}
bool i2cWriteRegister(u8 dev_id, u8 reg, u8 data)
{
bool ret = i2cWriteRegisterNoWait(dev_id, reg, data);
wait(3ULL);
>>>>>>> Do the same for arm9 exceptions
bool I2C_writeReg(I2cDevice devId, u8 regAddr, u8 data)
{

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@ -90,6 +90,7 @@ bool I2C_writeRegBuf(I2cDevice devId, u8 regAddr, const u8 *in, u32 size);
*/
u8 I2C_readReg(I2cDevice devId, u8 regAddr);
<<<<<<< HEAD
/**
* @brief Writes a byte to a I2C register.
*
@ -100,3 +101,8 @@ u8 I2C_readReg(I2cDevice devId, u8 regAddr);
* @return Returns true on success and false on failure.
*/
bool I2C_writeReg(I2cDevice devId, u8 regAddr, u8 data);
=======
u8 i2cReadRegister(u8 dev_id, u8 reg);
bool i2cWriteRegister(u8 dev_id, u8 reg, u8 data);
bool i2cWriteRegisterNoWait(u8 dev_id, u8 reg, u8 data);
>>>>>>> Do the same for arm9 exceptions

View File

@ -39,6 +39,7 @@
#include "memory.h"
#include "config.h"
#include "utils.h"
#include "arm9_exception_handlers.h"
#include "../build/bundled.h"
u8 *getProcess9Info(u8 *pos, u32 size, u32 *process9Size, u32 *process9MemAddr)
@ -501,7 +502,7 @@ u32 patchSvcBreak9(u8 *pos, u32 size, u32 kernel9Address)
addr[0] = 0xE1A0800D;
addr[1] = 0xE12FFF7F;
*(vu32 *)0x01FF8004 = arm9SvcTable[0x3C]; //BreakPtr
arm9ExceptionHandlerSvcBreakAddress = arm9SvcTable[0x3C]; //BreakPtr
return 0;
}

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@ -134,6 +134,7 @@ _start:
mov r1, r10
mov r2, r11
b main
.pool
.section .chainloader.text.start, "ax", %progbits
.align 4
@ -142,6 +143,7 @@ _start:
chainload:
ldr sp, =__itcm_stack_top__
b chainloader_main
.pool
.global disableMpuAndJumpToEntrypoints
.type disableMpuAndJumpToEntrypoints, %function
@ -173,3 +175,5 @@ disableMpuAndJumpToEntrypoints:
mov r1, r5
ldr r2, =0x3BEEF
bx r6
.pool