The ARM11 exception handlers are now working.
Refactored the exception handling code in general.
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@@ -68,16 +68,6 @@ _commonHandler:
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noFPUInit:
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stmfd sp!, {r2,lr} @ it's a bit of a mess, but we will fix that later
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@ order of saved regs now: cpsr, pc + (2/4/8), r8-r14, r0-r7
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ldr r4, =#0xdfff3ffc
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ldr r5, =#0xffff0014
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ldr r5, [r5] @ 0xeafffffe
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mov r6, #0
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poisonLoop:
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str r5, [r4, #4]! @ poison exception vectors in order to hang the other threads
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add r6, #1
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cmp r6, #8
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blt poisonLoop
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mov r0, sp
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mrc p15,0,r2,c0,c0,5 @ CPU ID register
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@@ -93,3 +83,11 @@ GEN_HANDLER dataAbortHandler
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.type mcuReboot, %function
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mcuReboot:
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b . @ will be replaced
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.global clearDCacheAndDMB
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.type clearDCacheAndDMB, %function
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clearDCacheAndDMB:
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mov r0, #0
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mcr p15,0,r0,c7,c14,0 @ Clean and Invalidate Entire Data Cache
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mcr p15,0,r0,c7,c10,4 @ Drain Memory Barrier
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bx lr
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