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The ARM11 exception handlers are now working.

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Refactored the exception handling code in general.
This commit is contained in:
TuxSH
2016-06-03 21:38:35 +02:00
parent 2d7dde9cf9
commit bb230de72c
9 changed files with 61 additions and 86 deletions
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2
exceptions/arm11/source/handlers.h
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@@ -8,6 +8,8 @@
#pragma once
void __attribute__((noreturn)) mcuReboot(void);
void clearDCacheAndDMB(void);
void FIQHandler(void);
void undefinedInstructionHandler(void);
void dataAbortHandler(void);

18
exceptions/arm11/source/handlers.s
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@@ -68,16 +68,6 @@ _commonHandler:
noFPUInit:
stmfd sp!, {r2,lr} @ it's a bit of a mess, but we will fix that later
@ order of saved regs now: cpsr, pc + (2/4/8), r8-r14, r0-r7
ldr r4, =#0xdfff3ffc
ldr r5, =#0xffff0014
ldr r5, [r5] @ 0xeafffffe
mov r6, #0
poisonLoop:
str r5, [r4, #4]! @ poison exception vectors in order to hang the other threads
add r6, #1
cmp r6, #8
blt poisonLoop
mov r0, sp
mrc p15,0,r2,c0,c0,5 @ CPU ID register
@@ -93,3 +83,11 @@ GEN_HANDLER dataAbortHandler
.type mcuReboot, %function
mcuReboot:
b . @ will be replaced
.global clearDCacheAndDMB
.type clearDCacheAndDMB, %function
clearDCacheAndDMB:
mov r0, #0
mcr p15,0,r0,c7,c14,0 @ Clean and Invalidate Entire Data Cache
mcr p15,0,r0,c7,c10,4 @ Drain Memory Barrier
bx lr

11
exceptions/arm11/source/mainHandler.c
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@@ -12,7 +12,6 @@
#define REG_DUMP_SIZE (4*18)
#define CODE_DUMP_SIZE 48
#define STACK_DUMP_SIZE 0x2000
#define OTHER_DATA_SIZE 0
void __attribute__((noreturn)) mainHandler(u32 regs[18], u32 type, u32 cpuId, u32 fpexc)
@@ -29,9 +28,7 @@ void __attribute__((noreturn)) mainHandler(u32 regs[18], u32 type, u32 cpuId, u3
dump[4] = type; //Exception type
dump[6] = REG_DUMP_SIZE; //Register dump size (r0-r12, sp, lr, pc, cpsr, fpexc)
dump[7] = CODE_DUMP_SIZE; //Code dump size (10 ARM instructions, up to 20 Thumb instructions).
dump[8] = STACK_DUMP_SIZE; //Stack dump size
dump[9] = OTHER_DATA_SIZE; //Other data size
dump[5] = 40 + REG_DUMP_SIZE + CODE_DUMP_SIZE + STACK_DUMP_SIZE + OTHER_DATA_SIZE; //Total size
//Dump registers
//Current order of saved regs: cpsr, pc, r8-r12, sp, lr, r0-r7
@@ -50,22 +47,24 @@ void __attribute__((noreturn)) mainHandler(u32 regs[18], u32 type, u32 cpuId, u3
for(u32 i = 0; i < 8; i++)
regdump[i] = regs[9 + i];
dump[8] = 0x1000 - (regdump[13] & 0xfff); //Stack dump size (max. 0x1000 bytes)
dump[5] = 40 + REG_DUMP_SIZE + CODE_DUMP_SIZE + dump[8] + OTHER_DATA_SIZE; //Total size
//Dump code
u16 *codedump = (u16 *)(regdump + dump[6] / 4);
u16 *instr = (u16 *)pc - dump[7] / 2 + 1;
vu16 *instr = (vu16 *)pc - dump[7] / 2 + 1;
for(u32 i = 0; i < dump[7] / 2; i++)
codedump[i] = instr[i];
//Dump stack in place
vu32 *sp = (vu32 *)regdump[13];
vu32 *stackdump = (vu32 *)((vu8 *)FINAL_BUFFER + 40 + REG_DUMP_SIZE + CODE_DUMP_SIZE);
for(u32 i = 0; i < dump[8] / 4; i++)
stackdump[i] = sp[i];
for(u32 i = 0; i < (40 + REG_DUMP_SIZE + CODE_DUMP_SIZE) / 4; i++)
final[i] = dump[i];
while(final[0] != 0xDEADC0DE);
clearDCacheAndDMB();
mcuReboot();
}