LowLevel/Luma3DS-3GX
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Fix latest commit

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TuxSH 2016-09-21 11:25:44 +02:00 committed by GitHub
parent a8cd14dafd
commit a5b52a2470
1 changed files with 13 additions and 1 deletions
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14
source/screen.c
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@ -47,6 +47,16 @@ void __attribute__((naked)) arm11Stub(void)
((void (*)())*arm11Entry)(); ((void (*)())*arm11Entry)();
} }
/*
About cache coherency:
Flushing the data cache for **ALL** memory regions read from/written to by _both_ processors is mandatory on the arm9 processor.
Thus, we make sure there'll be a cache miss on the arm9 next time it's read.
Otherwise the arm9 won't see the changes made and things will break.
On the arm11, in the environment we're in, the MMU isn't enabled and nothing is cached.
*/
static void invokeArm11Function(void (*func)()) static void invokeArm11Function(void (*func)())
{ {
static bool hasCopiedStub = false; static bool hasCopiedStub = false;
@ -151,6 +161,7 @@ void clearScreens(bool clearTop, bool clearBottom)
flushDCacheRange(&clearTopTmp, 1); flushDCacheRange(&clearTopTmp, 1);
flushDCacheRange(&clearBottomTmp, 1); flushDCacheRange(&clearBottomTmp, 1);
flushDCacheRange((void *)fb, sizeof(struct fb));
invokeArm11Function(ARM11); invokeArm11Function(ARM11);
} }
@ -257,6 +268,7 @@ void initScreens(void)
if(PDN_GPU_CNT == 1) if(PDN_GPU_CNT == 1)
{ {
flushDCacheRange(&configData, sizeof(CfgData)); flushDCacheRange(&configData, sizeof(CfgData));
flushDCacheRange((void *)fb, sizeof(struct fb));
invokeArm11Function(ARM11); invokeArm11Function(ARM11);
clearScreens(true, true); clearScreens(true, true);
@ -269,4 +281,4 @@ void initScreens(void)
clearScreens(true, true); clearScreens(true, true);
updateBrightness(MULTICONFIG(BRIGHTNESS)); updateBrightness(MULTICONFIG(BRIGHTNESS));
} }
} }