LowLevel/Luma3DS-3GX
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Fixed intermittent splash from CakeBrah, made splash last slightly longer, added shutdown on error, slimmed down FatFs, added error on missing emuNAND, changed folder to "aurei", changed the dat name to "AuReiNand.dat", propered the built-in screen init of the chainloader, remade the look of the 3dsx

Browse Source 
(First luma-powered CFW!)
This commit is contained in:
Aurora
2016-03-20 01:00:45 +01:00
parent 6dfb33191f
commit 9b9f784c26
20 changed files with 215 additions and 146 deletions
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16
source/draw.c
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@@ -32,17 +32,17 @@ void __attribute__((naked)) shutdownLCD(void){
((void (*)())*arm11)();
}
static void clearScreen(void){
memset(fb->top_left, 0, 0x46500);
memset(fb->top_right, 0, 0x46500);
memset(fb->bottom, 0, 0x38400);
static void clearScreens(void){
memset32(fb->top_left, 0, 0x46500);
memset32(fb->top_right, 0, 0x46500);
memset32(fb->bottom, 0, 0x38400);
}
void loadSplash(void){
clearScreen();
clearScreens();
//Don't delay boot if no splash image is on the SD
if(fileRead(fb->top_left, "/rei/splash.bin", 0x46500) +
fileRead(fb->bottom, "/rei/splashbottom.bin", 0x38400)){
u64 i = 0xFFFFFF; while(--i) __asm("mov r0, r0"); //Less Ghetto sleep func
if(fileRead(fb->top_left, "/aurei/splash.bin", 0x46500) +
fileRead(fb->bottom, "/aurei/splashbottom.bin", 0x38400)){
u64 i = 0x1300000; while(--i) __asm("mov r0, r0"); //Less Ghetto sleep func
}
}

5
source/emunand.c
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@@ -22,6 +22,11 @@ void getEmunandSect(u32 *off, u32 *head, u32 emuNAND){
}
//Fallback to the first emuNAND if there's no second one
else if(emuNAND == 2) getEmunandSect(off, head, 1);
//Check if a RedNAND is present
else if(sdmmc_sdcard_readsectors(1, 1, temp) == 0){
if(*(u32 *)(temp + 0x100) != NCSD_MAGIC)
*head = 0;
}
}
}

2
source/fatfs/ffconf.h
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@@ -23,7 +23,7 @@
/ and optional writing functions as well. */
#define _FS_MINIMIZE 0
#define _FS_MINIMIZE 3
/* This option defines minimization level to remove some basic API functions.
/
/ 0: All basic functions are enabled.

25
source/firm.c
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@@ -32,7 +32,7 @@ void setupCFW(void){
//Retrieve the last booted FIRM
u8 previousFirm = CFG_BOOTENV;
u32 overrideConfig = 0;
const char lastConfigPath[] = "rei/lastbootcfg";
const char lastConfigPath[] = "aurei/lastbootcfg";
//Detect the console being used
if(PDN_MPCORE_CFG == 1) console = 0;
@@ -41,10 +41,10 @@ void setupCFW(void){
pressed = HID_PAD;
//Determine if A9LH is installed
if(a9lhBoot || fileExists("/rei/installeda9lh")){
if(a9lhBoot || fileExists("/aurei/installeda9lh")){
a9lhSetup = 1;
//Check flag for > 9.2 SysNAND
if(fileExists("/rei/updatedsysnand")) updatedSys = 1;
if(fileExists("/aurei/updatedsysnand")) updatedSys = 1;
}
//If booting with A9LH and it's a MCU reboot, try to force boot options
@@ -92,14 +92,14 @@ void setupCFW(void){
}
}
if(mode) firmPathPatched = emuNAND ? (emuNAND == 1 ? "/rei/patched_firmware_emu.bin" :
"/rei/patched_firmware_em2.bin") :
"/rei/patched_firmware_sys.bin";
if(mode) firmPathPatched = emuNAND ? (emuNAND == 1 ? "/aurei/patched_firmware_emu.bin" :
"/aurei/patched_firmware_em2.bin") :
"/aurei/patched_firmware_sys.bin";
//Skip decrypting and patching FIRM
if(fileExists("/rei/usepatchedfw")){
if(fileExists("/aurei/usepatchedfw")){
//Only needed with this flag
if(!mode) firmPathPatched = "/rei/patched_firmware90.bin";
if(!mode) firmPathPatched = "/aurei/patched_firmware90.bin";
if(fileExists(firmPathPatched)) usePatchedFirm = 1;
}
}
@@ -118,7 +118,7 @@ u32 loadFirm(void){
//Load FIRM from SD
else{
const char *path = usePatchedFirm ? firmPathPatched :
(mode ? "/rei/firmware.bin" : "/rei/firmware90.bin");
(mode ? "/aurei/firmware.bin" : "/aurei/firmware90.bin");
firmSize = fileSize(path);
if(!firmSize) return 0;
fileRead((u8 *)firmLocation, path, firmSize);
@@ -147,7 +147,7 @@ static u32 loadEmu(void){
emuCodeOffset;
//Read emunand code from SD
const char path[] = "/rei/emunand/emunand.bin";
const char path[] = "/aurei/emunand/emunand.bin";
u32 size = fileSize(path);
if(!size) return 0;
if(!console || !mode) nandRedir[5] = 0xA4;
@@ -168,6 +168,9 @@ static u32 loadEmu(void){
*pos_offset = emuOffset;
*pos_header = emuHeader;
//No emuNAND detected
if(!*pos_header) return 0;
//Patch emuNAND code in memory for O3DS and 9.0 N3DS
if(!console || !mode){
void *pos_instr = memsearch((void *)emuCodeOffset, "\xA6\x01\x08\x30", size, 4);
@@ -219,7 +222,7 @@ u32 patchFirm(void){
fOpenOffset;
//Read reboot code from SD
const char path[] = "/rei/reboot/reboot.bin";
const char path[] = "/aurei/reboot/reboot.bin";
u32 size = fileSize(path);
if(!size) return 0;
getReboot(firmLocation, firmSize, &rebootOffset);

98
source/i2c.c Normal file
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@@ -0,0 +1,98 @@
#include "i2c.h"
//-----------------------------------------------------------------------------
static const struct { u8 bus_id, reg_addr; } dev_data[] = {
{0, 0x4A}, {0, 0x7A}, {0, 0x78},
{1, 0x4A}, {1, 0x78}, {1, 0x2C},
{1, 0x2E}, {1, 0x40}, {1, 0x44},
{2, 0xD6}, {2, 0xD0}, {2, 0xD2},
{2, 0xA4}, {2, 0x9A}, {2, 0xA0},
};
static inline u8 i2cGetDeviceBusId(u8 device_id) {
return dev_data[device_id].bus_id;
}
static inline u8 i2cGetDeviceRegAddr(u8 device_id) {
return dev_data[device_id].reg_addr;
}
//-----------------------------------------------------------------------------
static vu8* reg_data_addrs[] = {
(vu8*)(I2C1_REG_OFF + I2C_REG_DATA),
(vu8*)(I2C2_REG_OFF + I2C_REG_DATA),
(vu8*)(I2C3_REG_OFF + I2C_REG_DATA),
};
static inline vu8* i2cGetDataReg(u8 bus_id) {
return reg_data_addrs[bus_id];
}
//-----------------------------------------------------------------------------
static vu8* reg_cnt_addrs[] = {
(vu8*)(I2C1_REG_OFF + I2C_REG_CNT),
(vu8*)(I2C2_REG_OFF + I2C_REG_CNT),
(vu8*)(I2C3_REG_OFF + I2C_REG_CNT),
};
static inline vu8* i2cGetCntReg(u8 bus_id) {
return reg_cnt_addrs[bus_id];
}
//-----------------------------------------------------------------------------
static inline void i2cWaitBusy(u8 bus_id) {
while (*i2cGetCntReg(bus_id) & 0x80);
}
static inline u32 i2cGetResult(u8 bus_id) {
i2cWaitBusy(bus_id);
return (*i2cGetCntReg(bus_id) >> 4) & 1;
}
static void i2cStop(u8 bus_id, u8 arg0) {
*i2cGetCntReg(bus_id) = (arg0 << 5) | 0xC0;
i2cWaitBusy(bus_id);
*i2cGetCntReg(bus_id) = 0xC5;
}
//-----------------------------------------------------------------------------
static u32 i2cSelectDevice(u8 bus_id, u8 dev_reg) {
i2cWaitBusy(bus_id);
*i2cGetDataReg(bus_id) = dev_reg;
*i2cGetCntReg(bus_id) = 0xC2;
return i2cGetResult(bus_id);
}
static u32 i2cSelectRegister(u8 bus_id, u8 reg) {
i2cWaitBusy(bus_id);
*i2cGetDataReg(bus_id) = reg;
*i2cGetCntReg(bus_id) = 0xC0;
return i2cGetResult(bus_id);
}
//-----------------------------------------------------------------------------
u32 i2cWriteRegister(u8 dev_id, u8 reg, u8 data) {
u8 bus_id = i2cGetDeviceBusId(dev_id);
u8 dev_addr = i2cGetDeviceRegAddr(dev_id);
for (int i = 0; i < 8; i++) {
if (i2cSelectDevice(bus_id, dev_addr) && i2cSelectRegister(bus_id, reg)) {
i2cWaitBusy(bus_id);
*i2cGetDataReg(bus_id) = data;
*i2cGetCntReg(bus_id) = 0xC1;
i2cStop(bus_id, 0);
if (i2cGetResult(bus_id))
return 1;
}
*i2cGetCntReg(bus_id) = 0xC5;
i2cWaitBusy(bus_id);
}
return 0;
}

18
source/i2c.h Normal file
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@@ -0,0 +1,18 @@
#pragma once
#include "types.h"
#define I2C1_REG_OFF 0x10161000
#define I2C2_REG_OFF 0x10144000
#define I2C3_REG_OFF 0x10148000
#define I2C_REG_DATA 0
#define I2C_REG_CNT 1
#define I2C_REG_CNTEX 2
#define I2C_REG_SCL 4
#define I2C_DEV_MCU 3
#define I2C_DEV_GYRO 10
#define I2C_DEV_IR 13
u32 i2cWriteRegister(u8 dev_id, u8 reg, u8 data);

4
source/loader.c
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@@ -8,7 +8,7 @@
#define PAYLOAD_ADDRESS 0x24F00000
void loadPayload(void){
if(fileExists("rei/payloads/default.bin") &&
fileRead((u8 *)PAYLOAD_ADDRESS, "rei/loader.bin", 0))
if(fileExists("aurei/payloads/default.bin") &&
fileRead((u8 *)PAYLOAD_ADDRESS, "aurei/loader.bin", 0))
((void (*)())PAYLOAD_ADDRESS)();
}

5
source/main.c
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@@ -8,6 +8,7 @@
#include "fs.h"
#include "firm.h"
#include "i2c.h"
void main(void){
mountSD();
@@ -18,4 +19,8 @@ void startCFW(void){
if(!loadFirm()) return;
if(!patchFirm()) return;
launchFirm();
}
void shutdown(void){
i2cWriteRegister(I2C_DEV_MCU, 0x20, 1);
}

6
source/memory.c
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@@ -19,6 +19,12 @@ void memset(void *dest, int filler, u32 size){
destc[i] = (u8)filler;
}
void memset32(void *dest, u32 filler, u32 size){
u32 *dest32 = (u32 *)dest;
for (u32 i = 0; i < size / 4; i++)
dest32[i] = filler;
}
int memcmp(const void *buf1, const void *buf2, u32 size){
const u8 *buf1c = (const u8 *)buf1;
const u8 *buf2c = (const u8 *)buf2;

1
source/memory.h
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@@ -10,5 +10,6 @@
void memcpy(void *dest, const void *src, u32 size);
void memset(void *dest, int filler, u32 size);
void memset32(void *dest, u32 filler, u32 size);
int memcmp(const void *buf1, const void *buf2, u32 size);
void *memsearch(void *start_pos, const void *search, u32 size, u32 size_search);

15
source/start.s
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@@ -10,7 +10,7 @@ _start:
mcr p15, 0, r0, c5, c0, 2 @ write data access
mcr p15, 0, r0, c5, c0, 3 @ write instruction access
@ Set MPU permissions
@ Set MPU permissions and cache settings
ldr r0, =0xFFFF001D @ ffff0000 32k
ldr r1, =0x01FF801D @ 01ff8000 32k
ldr r2, =0x08000027 @ 08000000 1M
@@ -27,6 +27,11 @@ _start:
mcr p15, 0, r5, c6, c5, 0
mcr p15, 0, r6, c6, c6, 0
mcr p15, 0, r7, c6, c7, 0
mov r4, #0x25
mov r0, #0x5
mcr p15, 0, r4, c2, c0, 0 @ data cacheable
mcr p15, 0, r4, c2, c0, 1 @ instruction cacheable
mcr p15, 0, r0, c3, c0, 0 @ data bufferable
@ Enable caches
mrc p15, 0, r0, c1, c0, 0 @ read control register
@@ -48,13 +53,11 @@ _start:
bl main
@ Set cache settings
mov r0, #0x25
mcr p15, 0, r0, c3, c0, 0 @ Write bufferable 0, 2, 5
mcr p15, 0, r0, c2, c0, 0 @ Data cacheable 0, 2, 5
mcr p15, 0, r0, c2, c0, 1 @ Inst cacheable 0, 2, 5
mcr p15, 0, r4, c3, c0, 0 @ data bufferable
bl startCFW
bl shutdown
.die:
b .die