Always enable ARM9 exceptions, update .gitignore

This commit is contained in:
TuxSH 2017-06-09 02:31:14 +02:00
parent 4d99143da0
commit 9a3d9aed30
4 changed files with 15 additions and 20 deletions

1
.gitignore vendored
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@ -1,3 +1,4 @@
.vscode
out out
build build
arm11/build arm11/build

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@ -201,7 +201,7 @@ u32 loadFirm(FirmwareType *firmType, FirmwareSource nandType, bool loadFromStora
return firmVersion; return firmVersion;
} }
u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, bool loadFromStorage, bool isSafeMode, bool doUnitinfoPatch, bool enableExceptionHandlers) u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, bool loadFromStorage, bool isSafeMode, bool doUnitinfoPatch)
{ {
u8 *arm9Section = (u8 *)firm + firm->section[2].offset, u8 *arm9Section = (u8 *)firm + firm->section[2].offset,
*arm11Section1 = (u8 *)firm + firm->section[1].offset; *arm11Section1 = (u8 *)firm + firm->section[1].offset;
@ -266,13 +266,10 @@ u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, bool loadFromStora
if(!ISDEVUNIT) ret += patchCheckForDevCommonKey(process9Offset, process9Size); if(!ISDEVUNIT) ret += patchCheckForDevCommonKey(process9Offset, process9Size);
} }
if(enableExceptionHandlers)
{
//ARM9 exception handlers //ARM9 exception handlers
ret += patchArm9ExceptionHandlersInstall(arm9Section, kernel9Size); ret += patchArm9ExceptionHandlersInstall(arm9Section, kernel9Size);
ret += patchSvcBreak9(arm9Section, kernel9Size, (u32)firm->section[2].address); ret += patchSvcBreak9(arm9Section, kernel9Size, (u32)firm->section[2].address);
ret += patchKernel9Panic(arm9Section, kernel9Size); ret += patchKernel9Panic(arm9Section, kernel9Size);
}
if(CONFIG(PATCHACCESS)) if(CONFIG(PATCHACCESS))
ret += patchP9AccessChecks(process9Offset, process9Size); ret += patchP9AccessChecks(process9Offset, process9Size);
@ -356,7 +353,7 @@ u32 patchAgbFirm(bool loadFromStorage, bool doUnitinfoPatch)
return ret; return ret;
} }
u32 patch1x2xNativeAndSafeFirm(bool enableExceptionHandlers) u32 patch1x2xNativeAndSafeFirm(void)
{ {
u8 *arm9Section = (u8 *)firm + firm->section[2].offset; u8 *arm9Section = (u8 *)firm + firm->section[2].offset;
@ -379,12 +376,9 @@ u32 patch1x2xNativeAndSafeFirm(bool enableExceptionHandlers)
ret += ISN3DS ? patchSignatureChecks(process9Offset, process9Size) : patchOldSignatureChecks(process9Offset, process9Size); ret += ISN3DS ? patchSignatureChecks(process9Offset, process9Size) : patchOldSignatureChecks(process9Offset, process9Size);
if(enableExceptionHandlers)
{
//ARM9 exception handlers //ARM9 exception handlers
ret += patchArm9ExceptionHandlersInstall(arm9Section, kernel9Size); ret += patchArm9ExceptionHandlersInstall(arm9Section, kernel9Size);
ret += patchSvcBreak9(arm9Section, kernel9Size, (u32)firm->section[2].address); ret += patchSvcBreak9(arm9Section, kernel9Size, (u32)firm->section[2].address);
}
return ret; return ret;
} }

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@ -32,10 +32,10 @@
static Firm *const firm = (Firm *const)0x20001000; static Firm *const firm = (Firm *const)0x20001000;
u32 loadFirm(FirmwareType *firmType, FirmwareSource nandType, bool loadFromStorage, bool isSafeMode); u32 loadFirm(FirmwareType *firmType, FirmwareSource nandType, bool loadFromStorage, bool isSafeMode);
u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, bool loadFromStorage, bool isSafeMode, bool doUnitinfoPatch, bool enableExceptionHandlers); u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, bool loadFromStorage, bool isSafeMode, bool doUnitinfoPatch);
u32 patchTwlFirm(u32 firmVersion, bool loadFromStorage, bool doUnitinfoPatch); u32 patchTwlFirm(u32 firmVersion, bool loadFromStorage, bool doUnitinfoPatch);
u32 patchAgbFirm(bool loadFromStorage, bool doUnitinfoPatch); u32 patchAgbFirm(bool loadFromStorage, bool doUnitinfoPatch);
u32 patch1x2xNativeAndSafeFirm(bool enableExceptionHandlers); u32 patch1x2xNativeAndSafeFirm(void);
bool checkFirmPayload(u32 payloadSize); bool checkFirmPayload(u32 payloadSize);
void launchFirm(int argc, char **argv); void launchFirm(int argc, char **argv);

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@ -288,12 +288,12 @@ boot:
bool loadFromStorage = CONFIG(LOADEXTFIRMSANDMODULES); bool loadFromStorage = CONFIG(LOADEXTFIRMSANDMODULES);
u32 firmVersion = loadFirm(&firmType, firmSource, loadFromStorage, isSafeMode); u32 firmVersion = loadFirm(&firmType, firmSource, loadFromStorage, isSafeMode);
bool doUnitinfoPatch = CONFIG(PATCHUNITINFO), enableExceptionHandlers = CONFIG(PATCHUNITINFO); bool doUnitinfoPatch = CONFIG(PATCHUNITINFO);
u32 res; u32 res;
switch(firmType) switch(firmType)
{ {
case NATIVE_FIRM: case NATIVE_FIRM:
res = patchNativeFirm(firmVersion, nandType, loadFromStorage, isSafeMode, doUnitinfoPatch, enableExceptionHandlers); res = patchNativeFirm(firmVersion, nandType, loadFromStorage, isSafeMode, doUnitinfoPatch);
break; break;
case TWL_FIRM: case TWL_FIRM:
res = patchTwlFirm(firmVersion, loadFromStorage, doUnitinfoPatch); res = patchTwlFirm(firmVersion, loadFromStorage, doUnitinfoPatch);
@ -304,7 +304,7 @@ boot:
case SAFE_FIRM: case SAFE_FIRM:
case SYSUPDATER_FIRM: case SYSUPDATER_FIRM:
case NATIVE_FIRM1X2X: case NATIVE_FIRM1X2X:
res = patch1x2xNativeAndSafeFirm(enableExceptionHandlers); res = patch1x2xNativeAndSafeFirm();
break; break;
} }