Remove assumptions
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248ea82f76
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973640f023
@ -177,7 +177,7 @@ u32 patchEmuNand(u8 *arm9Section, u32 arm9SectionSize, u8 *process9Offset, u32 p
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//Copy EmuNAND code
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//Copy EmuNAND code
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u8 *freeK9Space;
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u8 *freeK9Space;
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ret += getFreeK9Space(arm9Section + 0x13500, arm9SectionSize - 0x13500, &freeK9Space);
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ret += getFreeK9Space(arm9Section, arm9SectionSize, &freeK9Space);
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if(!ret)
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if(!ret)
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{
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{
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memcpy(freeK9Space, emunand_bin, emunand_bin_size);
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memcpy(freeK9Space, emunand_bin, emunand_bin_size);
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@ -198,7 +198,7 @@ u32 patchEmuNand(u8 *arm9Section, u32 arm9SectionSize, u8 *process9Offset, u32 p
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ret += patchNandRw(process9Offset, process9Size, (u32)(freeK9Space - arm9Section + kernel9Address));
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ret += patchNandRw(process9Offset, process9Size, (u32)(freeK9Space - arm9Section + kernel9Address));
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//Set MPU
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//Set MPU
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ret += patchMpu(arm9Section + 0x13500, arm9SectionSize - 0x13500);
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ret += patchMpu(arm9Section, arm9SectionSize);
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}
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}
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return ret;
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return ret;
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@ -127,7 +127,7 @@ u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, u32
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//Find the Process9 .code location, size and memory address
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//Find the Process9 .code location, size and memory address
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u32 process9Size,
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u32 process9Size,
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process9MemAddr;
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process9MemAddr;
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u8 *process9Offset = getProcess9Info(arm9Section + 0x15000, firm->section[2].size - 0x15000, &process9Size, &process9MemAddr);
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u8 *process9Offset = getProcess9Info(arm9Section, firm->section[2].size, &process9Size, &process9MemAddr);
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//Find the Kernel11 SVC table and handler, exceptions page and free space locations
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//Find the Kernel11 SVC table and handler, exceptions page and free space locations
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u32 baseK11VA;
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u32 baseK11VA;
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