More cleanup
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parent
67e229e5a9
commit
70e82e627b
@ -368,15 +368,15 @@ void patchCode(u64 progId, u8 *code, u32 size)
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0xE0, 0x1E, 0xFF, 0x2F, 0xE1, 0x01, 0x01, 0x01
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};
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u8 *fdpVer = memsearch(code, fpdVerPattern, size, sizeof(fpdVerPattern));
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if(fdpVer != NULL)
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{
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fdpVer += sizeof(fpdVerPattern) + 1;
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static const u8 fpdVerPatch = 0x05;
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//Allow online access to work with old friends modules
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if(*fdpVer < 5) *fdpVer = 5;
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}
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patchMemory(code, size,
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fpdVerPattern,
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sizeof(fpdVerPattern), 9,
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&fpdVerPatch,
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sizeof(fpdVerPatch), 1
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);
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break;
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}
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@ -424,19 +424,21 @@ void patchCode(u64 progId, u8 *code, u32 size)
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sizeof(stopCartUpdatesPatch), 2
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);
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if(MULTICONFIG(1))
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u32 cpuSetting = MULTICONFIG(1);
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if(cpuSetting)
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{
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static const u8 cfgN3dsCpuPattern[] = {
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0x40, 0xA0, 0xE1, 0x07, 0x00
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0x00, 0x40, 0xA0, 0xE1, 0x07, 0x00
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};
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u8 *cfgN3dsCpuLoc = memsearch(code, cfgN3dsCpuPattern, size, sizeof(cfgN3dsCpuPattern));
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u32 *cfgN3dsCpuLoc = (u32 *)memsearch(code, cfgN3dsCpuPattern, size, sizeof(cfgN3dsCpuPattern));
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//Patch N3DS CPU Clock and L2 cache setting
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if(cfgN3dsCpuLoc != NULL)
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{
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*(u32 *)(cfgN3dsCpuLoc + 3) = 0xE1A00000;
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*(u32 *)(cfgN3dsCpuLoc + 0x1F) = 0xE3A00000 | MULTICONFIG(1);
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*(cfgN3dsCpuLoc + 1) = 0xE1A00000;
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*(cfgN3dsCpuLoc + 8) = 0xE3A00000 | cpuSetting;
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}
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}
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@ -181,7 +181,7 @@ void main(void)
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}
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}
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loadFirm(firmType, !firmType && (nandType == 2 || updatedSys == !firmSource));
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loadFirm(firmType, !firmType && updatedSys == !firmSource);
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if(!firmType) patchNativeFirm(nandType, emuHeader, a9lhInstalled);
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else patchTwlAgbFirm(firmType);
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