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Arm9LoaderHax support, cleaned Makefile

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This commit is contained in:
Aurora 2016-02-19 01:29:53 +01:00
parent e34ca44715
commit 6c25ed4607
7 changed files with 75 additions and 126 deletions
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26
Makefile
View File

@ -24,7 +24,7 @@ dir_reboot := reboot
dir_ninjhax := CakeBrah
ASFLAGS := -mlittle-endian -mcpu=arm946e-s -march=armv5te
CFLAGS := -Wall -Wextra -MMD -MP -marm $(ASFLAGS) -fno-builtin -fshort-wchar -std=c11 -Wno-main
CFLAGS := -Wall -Wextra -MMD -MP -marm $(ASFLAGS) -fno-builtin -fshort-wchar -std=c11 -Wno-main -O2
FLAGS := name=$(name).dat dir_out=$(abspath $(dir_out)) ICON=$(abspath icon.png) --no-print-directory
objects_cfw = $(patsubst $(dir_source)/%.s, $(dir_build)/%.o, \
@ -33,28 +33,28 @@ objects_cfw = $(patsubst $(dir_source)/%.s, $(dir_build)/%.o, \
.PHONY: all
all: launcher emunand emunando3ds reboot reboot2 rebootntr reboot2ntr ninjhax
all: launcher a9lh emunand emunando3ds reboot reboot2 rebootntr ninjhax
.PHONY: launcher
launcher: $(dir_out)/$(name).dat
.PHONY: a9lh
a9lh: $(dir_out)/arm9loaderhax.bin
.PHONY: emunand
emunand: $(dir_out)/rei-n3ds/emunand/emunand.bin
.PHONY: emunando3ds
emunand: $(dir_out)/rei-o3ds/emunand/emunand.bin
emunando3ds: $(dir_out)/rei-o3ds/emunand/emunand.bin
.PHONY: reboot
reboot: $(dir_out)/rei-o3ds/reboot/reboot1.bin
.PHONY: reboot2
reboot: $(dir_out)/rei-o3ds/reboot/reboot2.bin
reboot2: $(dir_out)/rei-o3ds/reboot/reboot2.bin
.PHONY: rebootntr
reboot: $(dir_out)/ntr-o3ds/reboot/reboot1.bin
.PHONY: reboot2ntr
reboot: $(dir_out)/ntr-o3ds/reboot/reboot2.bin
rebootntr: $(dir_out)/ntr-o3ds/reboot/reboot1.bin $(dir_out)/ntr-o3ds/reboot/reboot2.bin
.PHONY: ninjhax
ninjhax: $(dir_out)/3ds/$(name)
@ -65,11 +65,13 @@ clean:
@$(MAKE) $(FLAGS) -C $(dir_ninjhax) clean
rm -rf $(dir_out) $(dir_build)
.PHONY: $(dir_out)/$(name).dat
$(dir_out)/$(name).dat: $(dir_build)/main.bin $(dir_out)/rei-n3ds/ $(dir_out)/rei-o3ds/
@$(MAKE) $(FLAGS) -C $(dir_mset) launcher
dd if=$(dir_build)/main.bin of=$@ bs=512 seek=144
$(dir_out)/arm9loaderhax.bin: $(dir_build)/main.bin $(dir_out)/rei-n3ds/ $(dir_out)/rei-o3ds/
@cp $(dir_build)/main.bin $(dir_out)/arm9loaderhax.bin
$(dir_out)/3ds/$(name):
@mkdir -p "$(dir_out)/3ds/$(name)"
@$(MAKE) $(FLAGS) -C $(dir_ninjhax)
@ -99,15 +101,15 @@ $(dir_out)/rei-o3ds/reboot/reboot1.bin: $(dir_reboot)/rebootCode.s
@mkdir -p "$(dir_out)/rei-o3ds/reboot"
@mv reboot1.bin $(dir_out)/rei-o3ds/reboot
$(dir_out)/rei-o3ds/reboot/reboot2.bin: $(dir_reboot)/rebootCode.s
@mv reboot2.bin $(dir_out)/rei-o3ds/reboot
$(dir_out)/rei-o3ds/reboot/reboot2.bin: reboot2.bin
@cp -av reboot2.bin $(dir_out)/rei-o3ds/reboot
$(dir_out)/ntr-o3ds/reboot/reboot1.bin: $(dir_reboot)/rebootCodeNtr.s
@armips $<
@mkdir -p "$(dir_out)/ntr-o3ds/reboot"
@mv reboot1.bin $(dir_out)/ntr-o3ds/reboot
$(dir_out)/ntr-o3ds/reboot/reboot2.bin: $(dir_reboot)/rebootCodeNtr.s
$(dir_out)/ntr-o3ds/reboot/reboot2.bin: reboot2.bin
@mv reboot2.bin $(dir_out)/ntr-o3ds/reboot
$(dir_build)/main.bin: $(dir_build)/main.elf

100
reboot/rebootCodeNtr.s
View File

@ -57,103 +57,3 @@ patch005:
.pool
firm_fname:
.close
.create "reboot2.bin", 0x08094454
.org 0x08094454
.arm
stmfd sp!, {r4-r11,lr}
sub sp, sp, #0x3C
mrc p15, 0, r0, c2, c0, 0 ; dcacheable
mrc p15, 0, r12, c2, c0, 1 ; icacheable
mrc p15, 0, r1, c3, c0, 0 ; write bufferable
mrc p15, 0, r2, c5, c0, 2 ; daccess
mrc p15, 0, r3, c5, c0, 3 ; iaccess
ldr r4, =0x18000035 ; 0x18000000 128M
bic r2, r2, #0xF0000 ; unprotect region 4
bic r3, r3, #0xF0000 ; unprotect region 4
orr r0, r0, #0x10 ; dcacheable region 4
orr r2, r2, #0x30000 ; region 4 r/w
orr r3, r3, #0x30000 ; region 4 r/w
orr r12, r12, #0x10 ; icacheable region 4
orr r1, r1, #0x10 ; write bufferable region 4
mcr p15, 0, r0, c2, c0, 0
mcr p15, 0, r12, c2, c0, 1
mcr p15, 0, r1, c3, c0, 0 ; write bufferable
mcr p15, 0, r2, c5, c0, 2 ; daccess
mcr p15, 0, r3, c5, c0, 3 ; iaccess
mcr p15, 0, r4, c6, c4, 0 ; region 4 (hmmm)
mrc p15, 0, r0, c2, c0, 0 ; dcacheable
mrc p15, 0, r1, c2, c0, 1 ; icacheable
mrc p15, 0, r2, c3, c0, 0 ; write bufferable
orr r0, r0, #0x20 ; dcacheable region 5
orr r1, r1, #0x20 ; icacheable region 5
orr r2, r2, #0x20 ; write bufferable region 5
mcr p15, 0, r0, c2, c0, 0 ; dcacheable
mcr p15, 0, r1, c2, c0, 1 ; icacheable
mcr p15, 0, r2, c3, c0, 0 ; write bufferable
mov r4, #firm_addr
add r3, r4, #0x40
ldr r0, [r3] ; offset
add r0, r0, r4 ; src
ldr r1, [r3,#4] ; dst
ldr r2, [r3,#8] ; size
bl memcpy32
add r3, r4, #0x70
ldr r0, [r3]
add r0, r0, r4 ; src
ldr r1, [r3,#4] ; dst
ldr r2, [r3,#8] ; size
bl memcpy32
add r3, r4, #0xA0
ldr r0, [r3]
add r0, r0, r4 ; src
ldr r1, [r3,#4] ; dst
ldr r2, [r3,#8] ; size
bl memcpy32
mov r2, #0
mov r1, r2
@flush_cache:
mov r0, #0
mov r3, r2, lsl#30
@flush_cache_inner_loop:
orr r12, r3, r0, lsl#5
mcr p15, 0, r1, c7, c10, 4 ; drain write buffer
mcr p15, 0, r12, c7, c14, 2 ; clean and flush dcache entry (index and segment)
add r0, r0, #1
cmp r0, #0x20
bcc @flush_cache_inner_loop
add r2, r2, #1
cmp r2, #4
bcc @flush_cache
mcr p15, 0, r1, c7, c10, 4 ; drain write buffer
@mpu_enable:
ldr r0, =0x42078 ; alt vector select, enable itcm
mcr p15, 0, r0, c1, c0, 0
mcr p15, 0, r1, c7, c5, 0 ; flush dcache
mcr p15, 0, r1, c7, c6, 0 ; flush icache
mcr p15, 0, r1, c7, c10, 4 ; drain write buffer
mov r0, #firm_addr
mov r1, 0X1FFFFFFC
ldr r2, [r0,#8] ; arm11 entry
str r2, [r1]
ldr r0, [r0,#0xC] ; arm9 entry
add sp, sp, #0x3C
ldmfd sp!, {r4-r11,lr}
bx r0
.pool
memcpy32: ; memcpy32(void *src, void *dst, unsigned int size)
mov r12, lr
stmfd sp!, {r0-r4}
add r2, r2, r0
@memcpy_loop:
ldr r3, [r0], #4
str r3, [r1], #4
cmp r0, r2
blt @memcpy_loop
ldmfd sp!, {r0-r4}
mov lr, r12
bx lr
.pool
.close

26
source/firm.c
View File

@ -19,15 +19,17 @@ u8 mode = 1,
u16 pressed;
//Load firm into FCRAM
u8 loadFirm(void){
u8 loadFirm(u8 a9lh){
if(PDN_MPCORE_CFG == 1) console = 0;
if(!a9lh && fileSize("/rei/installeda9lh")) a9lh = 1;
pressed = HID_PAD;
section = firmLocation->section;
if((pressed & BUTTON_L1R1) == BUTTON_L1R1) mode = 0;
//If L and R are pressed, boot SysNAND with the NAND FIRM
if((pressed & BUTTON_L1R1) == BUTTON_L1R1){
mode = 0;
if(!a9lh && !mode){
//Read FIRM from NAND and write to FCRAM
firmSize = console ? 0xF2000 : 0xE9000;
nandFirm0((u8*)firmLocation, firmSize, console);
@ -35,12 +37,20 @@ u8 loadFirm(void){
}
//Load FIRM from SDCard
else{
const char firmPath[] = "/rei/firmware.bin";
firmSize = fileSize(firmPath);
if (!firmSize) return 1;
fileRead((u8*)firmLocation, firmPath, firmSize);
if((((u32)section[2].address >> 8) & 0xFF) != (console ? 0x60 : 0x68)) return 1;
if (a9lh && !mode){
char firmPath[] = "/rei/firmware90.bin";
firmSize = fileSize(firmPath);
if (!firmSize) return 1;
fileRead((u8*)firmLocation, firmPath, firmSize);
}
else {
char firmPath[] = "/rei/firmware.bin";
firmSize = fileSize(firmPath);
if (!firmSize) return 1;
fileRead((u8*)firmLocation, firmPath, firmSize);
}
}
if((((u32)section[2].address >> 8) & 0xFF) != (console ? 0x60 : 0x68)) return 1;
if(console) arm9loader((u8*)firmLocation + section[2].offset, mode);

2
source/firm.h
View File

@ -15,7 +15,7 @@
#define BUTTON_A 1
#define PATCHED_FIRM_PATH "/rei/patched_firmware.bin"
u8 loadFirm(void);
u8 loadFirm(u8 a9lh);
u8 loadEmu(void);
u8 patchFirm(void);
void launchFirm(void);

2
source/fs.c
View File

@ -59,7 +59,7 @@ int fileRead(u8 *dest, const char *path, u32 size){
}
int fileWrite(const u8 *buffer, const char *path, u32 size){
FRESULT fr;
FRESULT fr = 1;
FIL fp;
unsigned int br = 0;

7
source/main.c
View File

@ -10,10 +10,13 @@
#include "firm.h"
#include "draw.h"
u8 a9lh = 0;
u8 main(){
mountSD();
loadSplash();
if (loadFirm()) return 1;
if (!*((u32*)0x10141204)) a9lh = 1;
else loadSplash();
if (loadFirm(a9lh)) return 1;
if (patchFirm()) return 1;
launchFirm();
return 0;

34
source/start.s.a9lh Normal file
View File

@ -0,0 +1,34 @@
.section .text.start
.align 4
.global _start
_start:
@ Change the stack pointer
mov sp, #0x27000000
@ Give read/write access to all the memory regions
ldr r5, =0x33333333
mcr p15, 0, r5, c5, c0, 2 @ write data access
mcr p15, 0, r5, c5, c0, 3 @ write instruction access
@ Enable caches
mrc p15, 0, r4, c1, c0, 0 @ read control register
orr r4, r4, #(1<<12) @ - instruction cache enable
orr r4, r4, #(1<<2) @ - data cache enable
orr r4, r4, #(1<<0) @ - mpu enable
mcr p15, 0, r4, c1, c0, 0 @ write control register
@ Flush caches
mov r5, #0
mcr p15, 0, r5, c7, c5, 0 @ flush I-cache
mcr p15, 0, r5, c7, c6, 0 @ flush D-cache
mcr p15, 0, r5, c7, c10, 4 @ drain write buffer
@ Fixes mounting of SDMC
ldr r0, =0x10000020
mov r1, #0x340
str r1, [r0]
bl main
.die:
b .die