Arm9LoaderHax support, cleaned Makefile
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@@ -19,15 +19,17 @@ u8 mode = 1,
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u16 pressed;
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//Load firm into FCRAM
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u8 loadFirm(void){
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u8 loadFirm(u8 a9lh){
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if(PDN_MPCORE_CFG == 1) console = 0;
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if(!a9lh && fileSize("/rei/installeda9lh")) a9lh = 1;
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pressed = HID_PAD;
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section = firmLocation->section;
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if((pressed & BUTTON_L1R1) == BUTTON_L1R1) mode = 0;
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//If L and R are pressed, boot SysNAND with the NAND FIRM
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if((pressed & BUTTON_L1R1) == BUTTON_L1R1){
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mode = 0;
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if(!a9lh && !mode){
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//Read FIRM from NAND and write to FCRAM
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firmSize = console ? 0xF2000 : 0xE9000;
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nandFirm0((u8*)firmLocation, firmSize, console);
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@@ -35,12 +37,20 @@ u8 loadFirm(void){
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}
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//Load FIRM from SDCard
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else{
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const char firmPath[] = "/rei/firmware.bin";
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firmSize = fileSize(firmPath);
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if (!firmSize) return 1;
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fileRead((u8*)firmLocation, firmPath, firmSize);
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if((((u32)section[2].address >> 8) & 0xFF) != (console ? 0x60 : 0x68)) return 1;
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if (a9lh && !mode){
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char firmPath[] = "/rei/firmware90.bin";
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firmSize = fileSize(firmPath);
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if (!firmSize) return 1;
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fileRead((u8*)firmLocation, firmPath, firmSize);
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}
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else {
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char firmPath[] = "/rei/firmware.bin";
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firmSize = fileSize(firmPath);
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if (!firmSize) return 1;
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fileRead((u8*)firmLocation, firmPath, firmSize);
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}
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}
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if((((u32)section[2].address >> 8) & 0xFF) != (console ? 0x60 : 0x68)) return 1;
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if(console) arm9loader((u8*)firmLocation + section[2].offset, mode);
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@@ -15,7 +15,7 @@
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#define BUTTON_A 1
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#define PATCHED_FIRM_PATH "/rei/patched_firmware.bin"
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u8 loadFirm(void);
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u8 loadFirm(u8 a9lh);
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u8 loadEmu(void);
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u8 patchFirm(void);
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void launchFirm(void);
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@@ -59,7 +59,7 @@ int fileRead(u8 *dest, const char *path, u32 size){
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}
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int fileWrite(const u8 *buffer, const char *path, u32 size){
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FRESULT fr;
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FRESULT fr = 1;
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FIL fp;
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unsigned int br = 0;
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@@ -10,10 +10,13 @@
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#include "firm.h"
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#include "draw.h"
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u8 a9lh = 0;
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u8 main(){
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mountSD();
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loadSplash();
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if (loadFirm()) return 1;
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if (!*((u32*)0x10141204)) a9lh = 1;
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else loadSplash();
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if (loadFirm(a9lh)) return 1;
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if (patchFirm()) return 1;
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launchFirm();
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return 0;
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34
source/start.s.a9lh
Normal file
34
source/start.s.a9lh
Normal file
@@ -0,0 +1,34 @@
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.section .text.start
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.align 4
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.global _start
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_start:
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@ Change the stack pointer
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mov sp, #0x27000000
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@ Give read/write access to all the memory regions
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ldr r5, =0x33333333
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mcr p15, 0, r5, c5, c0, 2 @ write data access
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mcr p15, 0, r5, c5, c0, 3 @ write instruction access
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@ Enable caches
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mrc p15, 0, r4, c1, c0, 0 @ read control register
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orr r4, r4, #(1<<12) @ - instruction cache enable
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orr r4, r4, #(1<<2) @ - data cache enable
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orr r4, r4, #(1<<0) @ - mpu enable
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mcr p15, 0, r4, c1, c0, 0 @ write control register
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@ Flush caches
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mov r5, #0
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mcr p15, 0, r5, c7, c5, 0 @ flush I-cache
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mcr p15, 0, r5, c7, c6, 0 @ flush D-cache
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mcr p15, 0, r5, c7, c10, 4 @ drain write buffer
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@ Fixes mounting of SDMC
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ldr r0, =0x10000020
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mov r1, #0x340
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str r1, [r0]
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bl main
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.die:
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b .die
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