Fixed CTRNAND writing leaving encrypted data (thanks to d0k3), added path.txt support for CTRNAND, have the firmlaunch patch panic if both payloads cannot be found
This commit is contained in:
parent
fde2c371ef
commit
615e5dfaa7
@ -113,6 +113,6 @@ void __attribute__((noreturn)) mainHandler(u32 *regs, u32 type)
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*(ExceptionDumpHeader *)FINAL_BUFFER = dumpHeader;
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*(ExceptionDumpHeader *)FINAL_BUFFER = dumpHeader;
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((void (*)())0xFFFF0830)(); //Ensure that all memory transfers have completed and that the data cache has been flushed
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((void (*)())0xFFFF0830)(); //Ensure that all memory transfers have completed and that the data cache has been flushed
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i2cWriteRegister(I2C_DEV_MCU, 0x20, 1 << 2); //Reboot
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i2cWriteRegister(I2C_DEV_MCU, 0x20, 1 << 1); //Reboot
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while(true);
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while(true);
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}
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}
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@ -26,9 +26,12 @@ payload_maxsize equ 0x100000 ; Maximum size for the payload (maximum that CakeB
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bne pxi_wait_recv
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bne pxi_wait_recv
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adr r1, sd_fname
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adr r1, sd_fname
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mov r4, #0
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open_payload:
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open_payload:
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; Open file
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; Open file
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cmp r4, #2 ; Panic if both payloads don't exist
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beq svcBreak
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add r0, r7, #8
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add r0, r7, #8
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mov r2, #1
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mov r2, #1
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ldr r6, [fopen]
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ldr r6, [fopen]
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@ -36,6 +39,7 @@ payload_maxsize equ 0x100000 ; Maximum size for the payload (maximum that CakeB
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blx r6
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blx r6
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cmp r0, #0
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cmp r0, #0
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adrne r1, nand_fname
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adrne r1, nand_fname
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addne r4, #1
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bne open_payload
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bne open_payload
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; Read file
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; Read file
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@ -73,14 +77,18 @@ payload_maxsize equ 0x100000 ; Maximum size for the payload (maximum that CakeB
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die:
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die:
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b die
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b die
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svcBreak:
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swi 0x3C
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b die
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bytes_read: .word 0
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bytes_read: .word 0
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fopen: .ascii "OPEN"
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fopen: .ascii "OPEN"
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.pool
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.pool
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sd_fname: .dcw "sdmc:/arm9loaderhax.bin"
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sd_fname: .dcw "sdmc:/arm9loaderhax.bin"
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.word 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.word 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.pool
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.pool
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nand_fname: .dcw "nand:/arm9loaderhax.bin"
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nand_fname: .dcw "nand:/arm9loaderhax.bin"
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.word 0
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.word 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.align 4
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.align 4
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kernelcode_start:
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kernelcode_start:
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@ -213,7 +213,7 @@ void configMenu(bool isSdMode, bool oldPinStatus, u32 oldPinMode)
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{ .visible = isSdMode },
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{ .visible = isSdMode },
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{ .visible = isSdMode },
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{ .visible = isSdMode },
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{ .visible = true },
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{ .visible = true },
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{ .visible = isSdMode },
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{ .visible = true },
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{ .visible = true },
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{ .visible = true },
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{ .visible = true },
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{ .visible = true },
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{ .visible = true },
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{ .visible = true },
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@ -24,6 +24,7 @@
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* Crypto libs from http://github.com/b1l1s/ctr
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* Crypto libs from http://github.com/b1l1s/ctr
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* kernel9Loader code originally adapted from https://github.com/Reisyukaku/ReiNand/blob/228c378255ba693133dec6f3368e14d386f2cde7/source/crypto.c#L233
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* kernel9Loader code originally adapted from https://github.com/Reisyukaku/ReiNand/blob/228c378255ba693133dec6f3368e14d386f2cde7/source/crypto.c#L233
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* decryptNusFirm code adapted from https://github.com/mid-kid/CakesForeveryWan/blob/master/source/firm.c
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* decryptNusFirm code adapted from https://github.com/mid-kid/CakesForeveryWan/blob/master/source/firm.c
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* ctrNandWrite logic adapted from https://github.com/d0k3/GodMode9/blob/master/source/nand/nand.c
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*/
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*/
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#include "crypto.h"
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#include "crypto.h"
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@ -352,18 +353,31 @@ int ctrNandRead(u32 sector, u32 sectorCount, u8 *outbuf)
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return result;
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return result;
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}
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}
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int ctrNandWrite(u32 sector, u32 sectorCount, u8 *inbuf)
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int ctrNandWrite(u32 sector, u32 sectorCount, const u8 *inbuf)
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{
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{
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u8 *buffer = (u8 *)0x23000000;
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u32 bufferSize = 0xF00000;
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u8 __attribute__((aligned(4))) tmpCtr[sizeof(nandCtr)];
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u8 __attribute__((aligned(4))) tmpCtr[sizeof(nandCtr)];
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memcpy(tmpCtr, nandCtr, sizeof(nandCtr));
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memcpy(tmpCtr, nandCtr, sizeof(nandCtr));
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aes_advctr(tmpCtr, ((sector + fatStart) * 0x200) / AES_BLOCK_SIZE, AES_INPUT_BE | AES_INPUT_NORMAL);
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aes_advctr(tmpCtr, ((sector + fatStart) * 0x200) / AES_BLOCK_SIZE, AES_INPUT_BE | AES_INPUT_NORMAL);
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//Encrypt
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aes_use_keyslot(nandSlot);
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aes_use_keyslot(nandSlot);
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aes(inbuf, inbuf, sectorCount * 0x200 / AES_BLOCK_SIZE, tmpCtr, AES_CTR_MODE, AES_INPUT_BE | AES_INPUT_NORMAL);
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//Write
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int result = 0;
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return sdmmc_nand_writesectors(sector + fatStart, sectorCount, inbuf);
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for(u32 i = 0; i < sectorCount && !result; i += bufferSize / 0x200)
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{
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u32 tempAmount = (bufferSize / 0x200) < (sectorCount - i) ? (bufferSize / 0x200) : (sectorCount - i);
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memcpy(buffer, inbuf + (i * 0x200), tempAmount * 0x200);
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//Encrypt
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aes(buffer, buffer, tempAmount * 0x200 / AES_BLOCK_SIZE, tmpCtr, AES_CTR_MODE, AES_INPUT_BE | AES_INPUT_NORMAL);
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//Write
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result = sdmmc_nand_writesectors(i + sector + fatStart, tempAmount, buffer);
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}
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return result;
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}
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}
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void set6x7xKeys(void)
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void set6x7xKeys(void)
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@ -24,6 +24,7 @@
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* Crypto libs from http://github.com/b1l1s/ctr
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* Crypto libs from http://github.com/b1l1s/ctr
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* kernel9Loader code originally adapted from https://github.com/Reisyukaku/ReiNand/blob/228c378255ba693133dec6f3368e14d386f2cde7/source/crypto.c#L233
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* kernel9Loader code originally adapted from https://github.com/Reisyukaku/ReiNand/blob/228c378255ba693133dec6f3368e14d386f2cde7/source/crypto.c#L233
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* decryptNusFirm code adapted from https://github.com/mid-kid/CakesForeveryWan/blob/master/source/firm.c
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* decryptNusFirm code adapted from https://github.com/mid-kid/CakesForeveryWan/blob/master/source/firm.c
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* ctrNandWrite logic adapted from https://github.com/d0k3/GodMode9/blob/master/source/nand/nand.c
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*/
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*/
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#pragma once
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#pragma once
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@ -106,7 +107,7 @@ extern FirmwareSource firmSource;
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void ctrNandInit(void);
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void ctrNandInit(void);
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int ctrNandRead(u32 sector, u32 sectorCount, u8 *outbuf);
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int ctrNandRead(u32 sector, u32 sectorCount, u8 *outbuf);
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int ctrNandWrite(u32 sector, u32 sectorCount, u8 *inbuf);
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int ctrNandWrite(u32 sector, u32 sectorCount, const u8 *inbuf);
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void set6x7xKeys(void);
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void set6x7xKeys(void);
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bool decryptExeFs(Cxi *cxi);
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bool decryptExeFs(Cxi *cxi);
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bool decryptNusFirm(const Ticket *ticket, Cxi *cxi, u32 ncchSize);
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bool decryptNusFirm(const Ticket *ticket, Cxi *cxi, u32 ncchSize);
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@ -88,7 +88,7 @@ DRESULT disk_write (
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)
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)
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{
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{
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return ((pdrv == SDCARD && !sdmmc_sdcard_writesectors(sector, count, (BYTE *)buff)) ||
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return ((pdrv == SDCARD && !sdmmc_sdcard_writesectors(sector, count, (BYTE *)buff)) ||
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(pdrv == CTRNAND && !ctrNandWrite(sector, count, (BYTE *)buff))) ? RES_OK : RES_PARERR;
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(pdrv == CTRNAND && !ctrNandWrite(sector, count, buff))) ? RES_OK : RES_PARERR;
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}
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}
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#endif
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#endif
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@ -109,7 +109,7 @@ u32 loadFirm(FirmwareType *firmType, FirmwareSource nandType, bool loadFromStora
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return firmVersion;
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return firmVersion;
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}
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}
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u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, u32 devMode)
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u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, bool isSdMode, u32 devMode)
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{
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{
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u8 *arm9Section = (u8 *)firm + firm->section[2].offset,
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u8 *arm9Section = (u8 *)firm + firm->section[2].offset,
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*arm11Section1 = (u8 *)firm + firm->section[1].offset;
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*arm11Section1 = (u8 *)firm + firm->section[1].offset;
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@ -148,7 +148,7 @@ u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, u32
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else if(ISA9LH || (ISFIRMLAUNCH && BOOTCFG_A9LH != 0)) ret += patchFirmWrites(process9Offset, process9Size);
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else if(ISA9LH || (ISFIRMLAUNCH && BOOTCFG_A9LH != 0)) ret += patchFirmWrites(process9Offset, process9Size);
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//Apply firmlaunch patches
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//Apply firmlaunch patches
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ret += patchFirmlaunches(process9Offset, process9Size, process9MemAddr);
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ret += patchFirmlaunches(process9Offset, process9Size, process9MemAddr, isSdMode);
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//11.0 FIRM patches
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//11.0 FIRM patches
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if(firmVersion >= (ISN3DS ? 0x21 : 0x52))
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if(firmVersion >= (ISN3DS ? 0x21 : 0x52))
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@ -25,7 +25,7 @@
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#include "types.h"
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#include "types.h"
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u32 loadFirm(FirmwareType *firmType, FirmwareSource nandType, bool loadFromStorage, bool isSdMode);
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u32 loadFirm(FirmwareType *firmType, FirmwareSource nandType, bool loadFromStorage, bool isSdMode);
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u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, u32 devMode);
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u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, bool isSdMode, u32 devMode);
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u32 patchTwlFirm(u32 firmVersion, u32 devMode);
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u32 patchTwlFirm(u32 firmVersion, u32 devMode);
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u32 patchAgbFirm(u32 devMode);
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u32 patchAgbFirm(u32 devMode);
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u32 patch1x2xNativeAndSafeFirm(u32 devMode);
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u32 patch1x2xNativeAndSafeFirm(u32 devMode);
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@ -230,7 +230,7 @@ void main(void)
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switch(firmType)
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switch(firmType)
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{
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{
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case NATIVE_FIRM:
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case NATIVE_FIRM:
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res = patchNativeFirm(firmVersion, nandType, emuHeader, devMode);
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res = patchNativeFirm(firmVersion, nandType, emuHeader, isSdMode, devMode);
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break;
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break;
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case SAFE_FIRM:
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case SAFE_FIRM:
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case NATIVE_FIRM1X2X:
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case NATIVE_FIRM1X2X:
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@ -101,7 +101,7 @@ u32 patchSignatureChecks(u8 *pos, u32 size)
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return ret;
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return ret;
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}
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}
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u32 patchFirmlaunches(u8 *pos, u32 size, u32 process9MemAddr)
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u32 patchFirmlaunches(u8 *pos, u32 size, u32 process9MemAddr, bool isSdMode)
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{
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{
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//Look for firmlaunch code
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//Look for firmlaunch code
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const u8 pattern[] = {0xE2, 0x20, 0x20, 0x90};
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const u8 pattern[] = {0xE2, 0x20, 0x20, 0x90};
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@ -146,7 +146,7 @@ u32 patchFirmlaunches(u8 *pos, u32 size, u32 process9MemAddr)
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finalPath[i] = (u16)path[i];
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finalPath[i] = (u16)path[i];
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finalPath[pathSize] = 0;
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finalPath[pathSize] = 0;
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u8 *pos_path = memsearch(off, u"sd", reboot_bin_size, 4) + 0xA;
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u8 *pos_path = memsearch(off, isSdMode ? u"sd" : u"na", reboot_bin_size, 4) + 0xA;
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memcpy(pos_path, finalPath, (pathSize + 1) * 2);
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memcpy(pos_path, finalPath, (pathSize + 1) * 2);
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}
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}
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}
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}
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@ -34,7 +34,7 @@ u8 *getProcess9Info(u8 *pos, u32 size, u32 *process9Size, u32 *process9MemAddr);
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u32 *getKernel11Info(u8 *pos, u32 size, u32 *baseK11VA, u8 **freeK11Space, u32 **arm11SvcHandler, u32 **arm11ExceptionsPage);
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u32 *getKernel11Info(u8 *pos, u32 size, u32 *baseK11VA, u8 **freeK11Space, u32 **arm11SvcHandler, u32 **arm11ExceptionsPage);
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u32 patchSignatureChecks(u8 *pos, u32 size);
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u32 patchSignatureChecks(u8 *pos, u32 size);
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u32 patchTitleInstallMinVersionChecks(u8 *pos, u32 size, u32 firmVersion);
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u32 patchTitleInstallMinVersionChecks(u8 *pos, u32 size, u32 firmVersion);
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u32 patchFirmlaunches(u8 *pos, u32 size, u32 process9MemAddr);
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u32 patchFirmlaunches(u8 *pos, u32 size, u32 process9MemAddr, bool isSdMode);
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u32 patchFirmWrites(u8 *pos, u32 size);
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u32 patchFirmWrites(u8 *pos, u32 size);
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u32 patchOldFirmWrites(u8 *pos, u32 size);
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u32 patchOldFirmWrites(u8 *pos, u32 size);
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u32 reimplementSvcBackdoor(u8 *pos, u32 *arm11SvcTable, u32 baseK11VA, u8 **freeK11Space);
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u32 reimplementSvcBackdoor(u8 *pos, u32 *arm11SvcTable, u32 baseK11VA, u8 **freeK11Space);
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@ -56,7 +56,7 @@ u32 waitInput(void)
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void mcuReboot(void)
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void mcuReboot(void)
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{
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{
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if(ISFIRMLAUNCH && PDN_GPU_CNT != 1) clearScreens(true, true, false);
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if(!ISFIRMLAUNCH && PDN_GPU_CNT != 1) clearScreens(true, true, false);
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//Ensure that all memory transfers have completed and that the data cache has been flushed
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//Ensure that all memory transfers have completed and that the data cache has been flushed
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flushEntireDCache();
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flushEntireDCache();
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@ -67,11 +67,11 @@ void mcuReboot(void)
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void mcuPowerOff(void)
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void mcuPowerOff(void)
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{
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{
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if(ISFIRMLAUNCH && PDN_GPU_CNT != 1) clearScreens(true, true, false);
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if(!ISFIRMLAUNCH && PDN_GPU_CNT != 1) clearScreens(true, true, false);
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//Ensure that all memory transfers have completed and that the data cache has been flushed
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//Ensure that all memory transfers have completed and that the data cache has been flushed
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flushEntireDCache();
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flushEntireDCache();
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i2cWriteRegister(I2C_DEV_MCU, 0x20, 1 << 0);
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i2cWriteRegister(I2C_DEV_MCU, 0x20, 1 << 0);
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while(true);
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while(true);
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}
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}
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Block a user