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Fix UNITINFO patch, limit kernel9 pattern searches to kernel9

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Aurora 2016-10-15 16:16:53 +02:00
parent 3b7b66b272
commit 53b6c17e33
4 changed files with 12 additions and 13 deletions
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6
source/emunand.c
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@ -184,12 +184,12 @@ static inline u32 patchMpu(u8 *pos, u32 size)
return ret;
}
u32 patchEmuNand(u8 *arm9Section, u32 arm9SectionSize, u8 *process9Offset, u32 process9Size, u32 emuHeader, u8 *kernel9Address)
u32 patchEmuNand(u8 *arm9Section, u32 kernel9Size, u8 *process9Offset, u32 process9Size, u32 emuHeader, u8 *kernel9Address)
{
u32 ret = 0;
u8 *freeK9Space;
ret += getFreeK9Space(arm9Section, arm9SectionSize, &freeK9Space);
ret += getFreeK9Space(arm9Section, kernel9Size, &freeK9Space);
if(!ret)
{
@ -213,7 +213,7 @@ u32 patchEmuNand(u8 *arm9Section, u32 arm9SectionSize, u8 *process9Offset, u32 p
ret += patchNandRw(process9Offset, process9Size, branchOffset);
//Set MPU
ret += patchMpu(arm9Section, arm9SectionSize);
ret += patchMpu(arm9Section, kernel9Size);
}
return ret;

2
source/emunand.h
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@ -27,4 +27,4 @@
#define ROUND_TO_4MB(a) (((a) + 0x2000 - 1) & (~(0x2000 - 1)))
void locateEmuNand(u32 *emuHeader, FirmwareSource *nandType);
u32 patchEmuNand(u8 *arm9Section, u32 arm9SectionSize, u8 *process9Offset, u32 process9Size, u32 emuHeader, u8 *kernel9Address);
u32 patchEmuNand(u8 *arm9Section, u32 kernel9Size, u8 *process9Offset, u32 process9Size, u32 emuHeader, u8 *kernel9Address);

13
source/firm.c
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@ -134,13 +134,14 @@ u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, boo
*arm11ExceptionsPage,
*arm11SvcTable = getKernel11Info(arm11Section1, firm->section[1].size, &baseK11VA, &freeK11Space, &arm11SvcHandler, &arm11ExceptionsPage);
u32 ret = 0;
u32 kernel9Size = firm->section[2].size - (process9Size + sizeof(Cxi) + 0x200),
ret = 0;
//Apply signature patches
ret += patchSignatureChecks(process9Offset, process9Size);
//Apply EmuNAND patches
if(nandType != FIRMWARE_SYSNAND) ret += patchEmuNand(arm9Section, firm->section[2].size, process9Offset, process9Size, emuHeader, firm->section[2].address);
if(nandType != FIRMWARE_SYSNAND) ret += patchEmuNand(arm9Section, kernel9Size, process9Offset, process9Size, emuHeader, firm->section[2].address);
//Apply FIRM0/1 writes patches on sysNAND to protect A9LH
else if(isA9lhInstalled) ret += patchFirmWrites(process9Offset, process9Size);
@ -161,7 +162,7 @@ u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, boo
ret += implementSvcGetCFWInfo(arm11Section1, arm11SvcTable, baseK11VA, &freeK11Space);
//Apply UNITINFO patch
if(devMode == 2) ret += patchUnitInfoValueSet(arm9Section, firm->section[2].size);
if(devMode == 2) ret += patchUnitInfoValueSet(arm9Section, kernel9Size);
if(devMode != 0 && isA9lhInstalled)
{
@ -173,9 +174,9 @@ u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, boo
ret += patchKernel11Panic(arm11Section1, firm->section[1].size);
//ARM9 exception handlers
ret += patchArm9ExceptionHandlersInstall(arm9Section, firm->section[2].size);
ret += patchSvcBreak9(arm9Section, firm->section[2].size, (u32)firm->section[2].address);
ret += patchKernel9Panic(arm9Section, firm->section[2].size);
ret += patchArm9ExceptionHandlersInstall(arm9Section, kernel9Size);
ret += patchSvcBreak9(arm9Section, kernel9Size, (u32)firm->section[2].address);
ret += patchKernel9Panic(arm9Section, kernel9Size);
}
if(CONFIG(PATCHACCESS))

4
source/patches.c
View File

@ -506,7 +506,7 @@ u32 patchK11ModuleChecks(u8 *pos, u32 size, u8 **freeK11Space)
u32 patchUnitInfoValueSet(u8 *pos, u32 size)
{
//Look for UNITINFO value being set during kernel sync
const u8 pattern[] = {0xA0, 0x13, 0x01, 0x10};
const u8 pattern[] = {0x01, 0x10, 0xA0, 0x13};
u32 ret;
u8 *off = memsearch(pos, pattern, size, sizeof(pattern));
@ -514,8 +514,6 @@ u32 patchUnitInfoValueSet(u8 *pos, u32 size)
if(off == NULL) ret = 1;
else
{
off -= 2;
off[0] = ISDEVUNIT ? 0 : 1;
off[3] = 0xE3;