Fix UNITINFO patch, limit kernel9 pattern searches to kernel9
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3b7b66b272
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53b6c17e33
@ -184,12 +184,12 @@ static inline u32 patchMpu(u8 *pos, u32 size)
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return ret;
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return ret;
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}
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}
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u32 patchEmuNand(u8 *arm9Section, u32 arm9SectionSize, u8 *process9Offset, u32 process9Size, u32 emuHeader, u8 *kernel9Address)
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u32 patchEmuNand(u8 *arm9Section, u32 kernel9Size, u8 *process9Offset, u32 process9Size, u32 emuHeader, u8 *kernel9Address)
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{
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{
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u32 ret = 0;
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u32 ret = 0;
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u8 *freeK9Space;
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u8 *freeK9Space;
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ret += getFreeK9Space(arm9Section, arm9SectionSize, &freeK9Space);
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ret += getFreeK9Space(arm9Section, kernel9Size, &freeK9Space);
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if(!ret)
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if(!ret)
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{
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{
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@ -213,7 +213,7 @@ u32 patchEmuNand(u8 *arm9Section, u32 arm9SectionSize, u8 *process9Offset, u32 p
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ret += patchNandRw(process9Offset, process9Size, branchOffset);
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ret += patchNandRw(process9Offset, process9Size, branchOffset);
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//Set MPU
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//Set MPU
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ret += patchMpu(arm9Section, arm9SectionSize);
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ret += patchMpu(arm9Section, kernel9Size);
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}
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}
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return ret;
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return ret;
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@ -27,4 +27,4 @@
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#define ROUND_TO_4MB(a) (((a) + 0x2000 - 1) & (~(0x2000 - 1)))
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#define ROUND_TO_4MB(a) (((a) + 0x2000 - 1) & (~(0x2000 - 1)))
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void locateEmuNand(u32 *emuHeader, FirmwareSource *nandType);
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void locateEmuNand(u32 *emuHeader, FirmwareSource *nandType);
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u32 patchEmuNand(u8 *arm9Section, u32 arm9SectionSize, u8 *process9Offset, u32 process9Size, u32 emuHeader, u8 *kernel9Address);
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u32 patchEmuNand(u8 *arm9Section, u32 kernel9Size, u8 *process9Offset, u32 process9Size, u32 emuHeader, u8 *kernel9Address);
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@ -134,13 +134,14 @@ u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, boo
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*arm11ExceptionsPage,
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*arm11ExceptionsPage,
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*arm11SvcTable = getKernel11Info(arm11Section1, firm->section[1].size, &baseK11VA, &freeK11Space, &arm11SvcHandler, &arm11ExceptionsPage);
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*arm11SvcTable = getKernel11Info(arm11Section1, firm->section[1].size, &baseK11VA, &freeK11Space, &arm11SvcHandler, &arm11ExceptionsPage);
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u32 ret = 0;
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u32 kernel9Size = firm->section[2].size - (process9Size + sizeof(Cxi) + 0x200),
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ret = 0;
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//Apply signature patches
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//Apply signature patches
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ret += patchSignatureChecks(process9Offset, process9Size);
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ret += patchSignatureChecks(process9Offset, process9Size);
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//Apply EmuNAND patches
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//Apply EmuNAND patches
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if(nandType != FIRMWARE_SYSNAND) ret += patchEmuNand(arm9Section, firm->section[2].size, process9Offset, process9Size, emuHeader, firm->section[2].address);
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if(nandType != FIRMWARE_SYSNAND) ret += patchEmuNand(arm9Section, kernel9Size, process9Offset, process9Size, emuHeader, firm->section[2].address);
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//Apply FIRM0/1 writes patches on sysNAND to protect A9LH
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//Apply FIRM0/1 writes patches on sysNAND to protect A9LH
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else if(isA9lhInstalled) ret += patchFirmWrites(process9Offset, process9Size);
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else if(isA9lhInstalled) ret += patchFirmWrites(process9Offset, process9Size);
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@ -161,7 +162,7 @@ u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, boo
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ret += implementSvcGetCFWInfo(arm11Section1, arm11SvcTable, baseK11VA, &freeK11Space);
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ret += implementSvcGetCFWInfo(arm11Section1, arm11SvcTable, baseK11VA, &freeK11Space);
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//Apply UNITINFO patch
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//Apply UNITINFO patch
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if(devMode == 2) ret += patchUnitInfoValueSet(arm9Section, firm->section[2].size);
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if(devMode == 2) ret += patchUnitInfoValueSet(arm9Section, kernel9Size);
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if(devMode != 0 && isA9lhInstalled)
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if(devMode != 0 && isA9lhInstalled)
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{
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{
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@ -173,9 +174,9 @@ u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, boo
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ret += patchKernel11Panic(arm11Section1, firm->section[1].size);
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ret += patchKernel11Panic(arm11Section1, firm->section[1].size);
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//ARM9 exception handlers
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//ARM9 exception handlers
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ret += patchArm9ExceptionHandlersInstall(arm9Section, firm->section[2].size);
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ret += patchArm9ExceptionHandlersInstall(arm9Section, kernel9Size);
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ret += patchSvcBreak9(arm9Section, firm->section[2].size, (u32)firm->section[2].address);
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ret += patchSvcBreak9(arm9Section, kernel9Size, (u32)firm->section[2].address);
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ret += patchKernel9Panic(arm9Section, firm->section[2].size);
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ret += patchKernel9Panic(arm9Section, kernel9Size);
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}
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}
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if(CONFIG(PATCHACCESS))
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if(CONFIG(PATCHACCESS))
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@ -506,7 +506,7 @@ u32 patchK11ModuleChecks(u8 *pos, u32 size, u8 **freeK11Space)
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u32 patchUnitInfoValueSet(u8 *pos, u32 size)
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u32 patchUnitInfoValueSet(u8 *pos, u32 size)
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{
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{
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//Look for UNITINFO value being set during kernel sync
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//Look for UNITINFO value being set during kernel sync
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const u8 pattern[] = {0xA0, 0x13, 0x01, 0x10};
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const u8 pattern[] = {0x01, 0x10, 0xA0, 0x13};
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u32 ret;
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u32 ret;
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u8 *off = memsearch(pos, pattern, size, sizeof(pattern));
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u8 *off = memsearch(pos, pattern, size, sizeof(pattern));
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@ -514,8 +514,6 @@ u32 patchUnitInfoValueSet(u8 *pos, u32 size)
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if(off == NULL) ret = 1;
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if(off == NULL) ret = 1;
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else
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else
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{
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{
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off -= 2;
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off[0] = ISDEVUNIT ? 0 : 1;
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off[0] = ISDEVUNIT ? 0 : 1;
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off[3] = 0xE3;
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off[3] = 0xE3;
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