Remove hardcoded CTRNAND FAT offsets, calculate them from parsing NCSD + CTR MBR
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parent
710d8cd15c
commit
28e5d8107f
@ -320,7 +320,7 @@ void sha(void *res, const void *src, u32 size, u32 mode)
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__attribute__((aligned(4))) static u8 nandCtr[AES_BLOCK_SIZE];
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static u8 nandSlot;
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static u32 fatStart;
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static u32 fatStart = 0;
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FirmwareSource firmSource;
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@ -333,7 +333,7 @@ __attribute__((aligned(4))) static const u8 key1s[2][AES_BLOCK_SIZE] = {
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{0xFF, 0x77, 0xA0, 0x9A, 0x99, 0x81, 0xE9, 0x48, 0xEC, 0x51, 0xC9, 0x32, 0x5D, 0x14, 0xEC, 0x25}
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};
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void ctrNandInit(void)
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int ctrNandInit(void)
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{
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__attribute__((aligned(4))) u8 cid[AES_BLOCK_SIZE],
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shaSum[SHA_256_HASH_SIZE];
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@ -342,16 +342,31 @@ void ctrNandInit(void)
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sha(shaSum, cid, sizeof(cid), SHA_256_MODE);
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memcpy(nandCtr, shaSum, sizeof(nandCtr));
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if(ISN3DS)
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nandSlot = ISN3DS ? 0x05 : 0x04;
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u8 __attribute__((aligned(4))) temp[0x200];
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int result;
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//Read NCSD header
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result = firmSource == FIRMWARE_SYSNAND ? sdmmc_nand_readsectors(0, 1, temp) : sdmmc_sdcard_readsectors(emuHeader, 1, temp);
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if(!result)
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{
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nandSlot = 0x05;
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fatStart = 0x5CAD7;
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}
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else
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{
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nandSlot = 0x04;
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fatStart = 0x5CAE5;
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u32 partitionNum = 1; //TWL partitions need to be first
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for(u8 *partitionId = temp + 0x111; *partitionId != 1; partitionId++, partitionNum++);
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u32 ctrMbrOffset = *((u32 *)(temp + 0x120) + (2 * partitionNum));
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//Read CTR MBR
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result = ctrNandRead(ctrMbrOffset, 1, temp);
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//Calculate final CTRNAND FAT offset
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if(!result) fatStart = ctrMbrOffset + *(u32 *)(temp + 0x1C6);
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}
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return result;
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}
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int ctrNandRead(u32 sector, u32 sectorCount, u8 *outbuf)
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@ -104,13 +104,14 @@
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#define SHA_224_HASH_SIZE (224 / 8)
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#define SHA_1_HASH_SIZE (160 / 8)
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extern u32 emuOffset;
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extern u32 emuOffset,
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emuHeader;
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extern FirmwareSource firmSource;
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void aes(void *dst, const void *src, u32 blockCount, void *iv, u32 mode, u32 ivMode);
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void sha(void *res, const void *src, u32 size, u32 mode);
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void ctrNandInit(void);
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int ctrNandInit(void);
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int ctrNandRead(u32 sector, u32 sectorCount, u8 *outbuf);
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int ctrNandWrite(u32 sector, u32 sectorCount, const u8 *inbuf);
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bool decryptExeFs(Cxi *cxi);
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@ -29,9 +29,10 @@
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#include "fatfs/sdmmc/sdmmc.h"
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#include "../build/bundled.h"
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u32 emuOffset;
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u32 emuOffset,
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emuHeader;
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void locateEmuNand(u32 *emuHeader, FirmwareSource *nandType)
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void locateEmuNand(FirmwareSource *nandType)
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{
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static u8 __attribute__((aligned(4))) temp[0x200];
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static u32 nandSize = 0,
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@ -70,7 +71,7 @@ void locateEmuNand(u32 *emuHeader, FirmwareSource *nandType)
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if(!sdmmc_sdcard_readsectors(nandOffset + 1, 1, temp) && memcmp(temp + 0x100, "NCSD", 4) == 0)
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{
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emuOffset = nandOffset + 1;
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*emuHeader = nandOffset + 1;
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emuHeader = nandOffset + 1;
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return;
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}
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@ -78,7 +79,7 @@ void locateEmuNand(u32 *emuHeader, FirmwareSource *nandType)
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else if(i != 2 && !sdmmc_sdcard_readsectors(nandOffset + nandSize, 1, temp) && memcmp(temp + 0x100, "NCSD", 4) == 0)
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{
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emuOffset = nandOffset;
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*emuHeader = nandOffset + nandSize;
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emuHeader = nandOffset + nandSize;
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return;
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}
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}
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@ -90,7 +91,7 @@ void locateEmuNand(u32 *emuHeader, FirmwareSource *nandType)
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if(*nandType != FIRMWARE_EMUNAND)
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{
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*nandType = FIRMWARE_EMUNAND;
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locateEmuNand(emuHeader, nandType);
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locateEmuNand(nandType);
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}
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else *nandType = FIRMWARE_SYSNAND;
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}
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@ -161,7 +162,7 @@ static inline u32 patchMpu(u8 *pos, u32 size)
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return 0;
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}
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u32 patchEmuNand(u8 *arm9Section, u32 kernel9Size, u8 *process9Offset, u32 process9Size, u32 emuHeader, u8 *kernel9Address)
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u32 patchEmuNand(u8 *arm9Section, u32 kernel9Size, u8 *process9Offset, u32 process9Size, u8 *kernel9Address)
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{
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u8 *freeK9Space;
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@ -30,5 +30,5 @@
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#define ROUND_TO_4MB(a) (((a) + 0x2000 - 1) & (~(0x2000 - 1)))
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void locateEmuNand(u32 *emuHeader, FirmwareSource *nandType);
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u32 patchEmuNand(u8 *arm9Section, u32 kernel9Size, u8 *process9Offset, u32 process9Size, u32 emuHeader, u8 *kernel9Address);
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void locateEmuNand(FirmwareSource *nandType);
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u32 patchEmuNand(u8 *arm9Section, u32 kernel9Size, u8 *process9Offset, u32 process9Size, u8 *kernel9Address);
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@ -37,23 +37,12 @@ DSTATUS disk_initialize (
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BYTE pdrv /* Physical drive nmuber to identify the drive */
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)
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{
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DSTATUS ret;
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static u32 sdmmcInitResult = 4;
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if(sdmmcInitResult == 4) sdmmcInitResult = sdmmc_sdcard_init();
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if(pdrv == CTRNAND)
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{
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if(!(sdmmcInitResult & 1))
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{
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ctrNandInit();
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ret = 0;
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}
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else ret = STA_NOINIT;
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}
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else ret = (!(sdmmcInitResult & 2)) ? 0 : STA_NOINIT;
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return ret;
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return ((pdrv == SDCARD && !(sdmmcInitResult & 2)) ||
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(pdrv == CTRNAND && !(sdmmcInitResult & 1) && !ctrNandInit())) ? 0 : STA_NOINIT;
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}
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@ -197,7 +197,7 @@ u32 loadFirm(FirmwareType *firmType, FirmwareSource nandType, bool loadFromStora
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return firmVersion;
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}
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u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, bool loadFromStorage, bool isSafeMode, bool doUnitinfoPatch, bool enableExceptionHandlers)
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u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, bool loadFromStorage, bool isSafeMode, bool doUnitinfoPatch, bool enableExceptionHandlers)
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{
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u8 *arm9Section = (u8 *)firm + firm->section[2].offset,
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*arm11Section1 = (u8 *)firm + firm->section[1].offset;
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@ -229,7 +229,7 @@ u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, boo
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ret += patchSignatureChecks(process9Offset, process9Size);
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//Apply EmuNAND patches
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if(nandType != FIRMWARE_SYSNAND) ret += patchEmuNand(arm9Section, kernel9Size, process9Offset, process9Size, emuHeader, firm->section[2].address);
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if(nandType != FIRMWARE_SYSNAND) ret += patchEmuNand(arm9Section, kernel9Size, process9Offset, process9Size, firm->section[2].address);
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//Apply FIRM0/1 writes patches on SysNAND to protect A9LH
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else ret += patchFirmWrites(process9Offset, process9Size);
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@ -28,7 +28,7 @@
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static Firm *const firm = (Firm *const)0x20001000;
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u32 loadFirm(FirmwareType *firmType, FirmwareSource nandType, bool loadFromStorage, bool isSafeMode);
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u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, bool loadFromStorage, bool isSafeMode, bool doUnitinfoPatch, bool enableExceptionHandlers);
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u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, bool loadFromStorage, bool isSafeMode, bool doUnitinfoPatch, bool enableExceptionHandlers);
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u32 patchTwlFirm(u32 firmVersion, bool loadFromStorage, bool doUnitinfoPatch);
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u32 patchAgbFirm(bool loadFromStorage, bool doUnitinfoPatch);
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u32 patch1x2xNativeAndSafeFirm(bool enableExceptionHandlers);
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@ -46,7 +46,6 @@ void main(int argc, char **argv, u32 magicWord)
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{
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bool isSafeMode = false,
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isNoForceFlagSet = false;
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u32 emuHeader;
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FirmwareType firmType;
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FirmwareSource nandType;
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@ -266,13 +265,13 @@ boot:
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//If we need to boot EmuNAND, make sure it exists
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if(nandType != FIRMWARE_SYSNAND)
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{
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locateEmuNand(&emuHeader, &nandType);
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locateEmuNand(&nandType);
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if(nandType == FIRMWARE_SYSNAND) firmSource = FIRMWARE_SYSNAND;
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}
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//Same if we're using EmuNAND as the FIRM source
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else if(firmSource != FIRMWARE_SYSNAND)
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locateEmuNand(&emuHeader, &firmSource);
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locateEmuNand(&firmSource);
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if(!isFirmlaunch)
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{
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@ -291,7 +290,7 @@ boot:
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switch(firmType)
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{
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case NATIVE_FIRM:
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res = patchNativeFirm(firmVersion, nandType, emuHeader, loadFromStorage, isSafeMode, doUnitinfoPatch, enableExceptionHandlers);
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res = patchNativeFirm(firmVersion, nandType, loadFromStorage, isSafeMode, doUnitinfoPatch, enableExceptionHandlers);
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break;
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case TWL_FIRM:
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res = patchTwlFirm(firmVersion, loadFromStorage, doUnitinfoPatch);
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