From 2238293c0f47ce6d0dc4084d79ccc4332d81cfc2 Mon Sep 17 00:00:00 2001 From: TuxSH Date: Sat, 2 Jul 2016 10:59:21 +0200 Subject: [PATCH] Fix indentation --- source/start.s | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/source/start.s b/source/start.s index 9fecc38..90f9f1d 100644 --- a/source/start.s +++ b/source/start.s @@ -27,13 +27,13 @@ start: mcr p15, 0, r0, c5, c0, 3 @ write instruction access @ Set MPU permissions and cache settings - ldr r0, =0xFFFF001D @ ffff0000 32k | bootrom (unprotected part) - ldr r1, =0x01FF801D @ 01ff8000 32k | itcm - ldr r2, =0x08000029 @ 08000000 2M | arm9 mem (O3DS / N3DS) - ldr r3, =0x10000029 @ 10000000 2M | io mem (ARM9 / first 2MB) - ldr r4, =0x20000037 @ 20000000 256M | fcram (O3DS / N3DS) - ldr r5, =0x1FF00027 @ 1FF00000 1M | dsp / axi wram - ldr r6, =0x1800002D @ 18000000 8M | vram (+ 2MB) + ldr r0, =0xFFFF001D @ ffff0000 32k | bootrom (unprotected part) + ldr r1, =0x01FF801D @ 01ff8000 32k | itcm + ldr r2, =0x08000029 @ 08000000 2M | arm9 mem (O3DS / N3DS) + ldr r3, =0x10000029 @ 10000000 2M | io mem (ARM9 / first 2MB) + ldr r4, =0x20000037 @ 20000000 256M | fcram (O3DS / N3DS) + ldr r5, =0x1FF00027 @ 1FF00000 1M | dsp / axi wram + ldr r6, =0x1800002D @ 18000000 8M | vram (+ 2MB) mov r7, #0 mov r8, #0x15 mcr p15, 0, r0, c6, c0, 0 @@ -44,9 +44,9 @@ start: mcr p15, 0, r5, c6, c5, 0 mcr p15, 0, r6, c6, c6, 0 mcr p15, 0, r7, c6, c7, 0 - mcr p15, 0, r8, c3, c0, 0 @ Write bufferable 0, 2, 4 - mcr p15, 0, r8, c2, c0, 0 @ Data cacheable 0, 2, 4 - mcr p15, 0, r8, c2, c0, 1 @ Inst cacheable 0, 2, 4 + mcr p15, 0, r8, c3, c0, 0 @ Write bufferable 0, 2, 4 + mcr p15, 0, r8, c2, c0, 0 @ Data cacheable 0, 2, 4 + mcr p15, 0, r8, c2, c0, 1 @ Inst cacheable 0, 2, 4 @ Enable caches / MPU mrc p15, 0, r0, c1, c0, 0 @ read control register