Added Rosalina, see details
- see release notes - ( ͡° ͜ʖ ͡°)( ͡° ͜ʖ ͡°)( ͡° ͜ʖ ͡°) - (∩ ͡° ͜ʖ ͡°)⊃━☆゚ - ( ͡ᵔ ͜ʖ ͡ᵔ) ♫┌( ͡° ͜ʖ ͡°)┘♪ ♫└( ͡° ͜ʖ ͡°)┐♪
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101
sysmodules/rosalina/source/csvc.s
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101
sysmodules/rosalina/source/csvc.s
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@ This paricular file is licensed under the following terms:
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@ This software is provided 'as-is', without any express or implied warranty. In no event will the authors be held liable
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@ for any damages arising from the use of this software.
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@
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@ Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it
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@ and redistribute it freely, subject to the following restrictions:
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@
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@ The origin of this software must not be misrepresented; you must not claim that you wrote the original software.
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@ If you use this software in a product, an acknowledgment in the product documentation would be appreciated but is not required.
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@
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@ Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software.
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@ This notice may not be removed or altered from any source distribution.
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.arm
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.balign 4
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.macro SVC_BEGIN name
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.section .text.\name, "ax", %progbits
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.global \name
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.type \name, %function
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.align 2
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.cfi_startproc
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\name:
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.endm
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.macro SVC_END
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.cfi_endproc
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.endm
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SVC_BEGIN svcCustomBackdoor
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svc 0x80
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bx lr
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SVC_END
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SVC_BEGIN svcConvertVAToPA
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svc 0x90
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bx lr
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SVC_END
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SVC_BEGIN svcFlushDataCacheRange
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svc 0x91
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bx lr
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SVC_END
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SVC_BEGIN svcFlushEntireDataCache
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svc 0x92
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bx lr
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SVC_END
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SVC_BEGIN svcInvalidateInstructionCacheRange
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svc 0x93
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bx lr
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SVC_END
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SVC_BEGIN svcInvalidateEntireInstructionCache
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svc 0x94
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bx lr
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SVC_END
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SVC_BEGIN svcMapProcessMemoryEx
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svc 0xA0
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bx lr
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SVC_END
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SVC_BEGIN svcUnmapProcessMemoryEx
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svc 0xA1
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bx lr
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SVC_END
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SVC_BEGIN svcControlMemoryEx
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push {r0, r4, r5}
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ldr r0, [sp, #0xC]
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ldr r4, [sp, #0xC+0x4]
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ldr r5, [sp, #0xC+0x8]
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svc 0xA2
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pop {r2, r4, r5}
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str r1, [r2]
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bx lr
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SVC_END
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SVC_BEGIN svcControlService
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svc 0xB0
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bx lr
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SVC_END
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SVC_BEGIN svcCopyHandle
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str r0, [sp, #-4]!
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svc 0xB1
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ldr r2, [sp], #4
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str r1, [r2]
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bx lr
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SVC_END
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SVC_BEGIN svcTranslateHandle
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str r0, [sp, #-4]!
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svc 0xB2
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ldr r2, [sp], #4
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str r1, [r2]
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bx lr
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SVC_END
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