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Refactor arm9 exception handling code (2)

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TuxSH 2016-05-06 16:41:18 +02:00
parent 4340c326dc
commit 1d77206ae4
1 changed files with 2 additions and 3 deletions
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5
exceptions/arm9/source/handlers.s
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@ -23,17 +23,16 @@
.global _commonHandler .global _commonHandler
.type _commonHandler, %function .type _commonHandler, %function
_commonHandler: _commonHandler:
sub r0, lr, r0 @ address of instruction that triggered the exception; we will handle the undef+Thumb case later
mrs r2, spsr mrs r2, spsr
mov r6, sp mov r6, sp
mrs r3, cpsr mrs r3, cpsr
orr r3, #0x1c0 @ disable Imprecise Aborts, IRQ and FIQ (AIF)
ands r4, r2, #0xf @ get the mode that triggered the exception ands r4, r2, #0xf @ get the mode that triggered the exception
moveq r4, #0xf @ usr => sys moveq r4, #0xf @ usr => sys
bic r5, r3, #0xf bic r5, r3, #0xf
orr r5, r4 orr r5, r4
msr cpsr_c, r5 @ change processor mode msr cpsr_c, r5 @ change processor mode
stmfd r6!, {r8-r14} stmfd r6!, {r8-lr}
msr cpsr_c, r3 @ restore processor mode msr cpsr_c, r3 @ restore processor mode
mov sp, r6 mov sp, r6