External ARM9 payload chainloading for a9lh, cleaned up the sdmmc library (from the dark-samus a9lh fork)
This commit is contained in:
Aurora
@@ -1,52 +1,52 @@
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#ifndef __SDMMC_H__
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#define __SDMMC_H__
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// Copyright 2014 Normmatt
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#define TRUE 1
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#define FALSE 0
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#pragma once
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#include <stdint.h>
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#include "common.h"
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#define SDMMC_BASE 0x10006000
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#define SDMMC_BASE 0x10006000u
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#define REG_SDCMD 0x00
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#define REG_SDPORTSEL 0x02
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#define REG_SDCMDARG 0x04
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#define REG_SDCMDARG0 0x04
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#define REG_SDCMDARG1 0x06
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#define REG_SDSTOP 0x08
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#define REG_SDBLKCOUNT 0x0a
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#define REG_SDCMD 0x00
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#define REG_SDPORTSEL 0x02
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#define REG_SDCMDARG 0x04
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#define REG_SDCMDARG0 0x04
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#define REG_SDCMDARG1 0x06
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#define REG_SDSTOP 0x08
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#define REG_SDBLKCOUNT 0x0a
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#define REG_SDRESP0 0x0c
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#define REG_SDRESP1 0x0e
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#define REG_SDRESP2 0x10
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#define REG_SDRESP3 0x12
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#define REG_SDRESP4 0x14
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#define REG_SDRESP5 0x16
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#define REG_SDRESP6 0x18
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#define REG_SDRESP7 0x1a
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#define REG_SDRESP0 0x0c
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#define REG_SDRESP1 0x0e
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#define REG_SDRESP2 0x10
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#define REG_SDRESP3 0x12
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#define REG_SDRESP4 0x14
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#define REG_SDRESP5 0x16
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#define REG_SDRESP6 0x18
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#define REG_SDRESP7 0x1a
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#define REG_SDSTATUS0 0x1c
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#define REG_SDSTATUS1 0x1e
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#define REG_SDSTATUS0 0x1c
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#define REG_SDSTATUS1 0x1e
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#define REG_SDIRMASK0 0x20
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#define REG_SDIRMASK1 0x22
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#define REG_SDCLKCTL 0x24
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#define REG_SDBLKLEN 0x26
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#define REG_SDOPT 0x28
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#define REG_SDFIFO 0x30
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#define REG_SDIRMASK0 0x20
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#define REG_SDIRMASK1 0x22
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#define REG_SDCLKCTL 0x24
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#define REG_DATACTL 0xd8
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#define REG_SDRESET 0xe0
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#define REG_SDPROTECTED 0xf6 //bit 0 determines if sd is protected or not?
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#define REG_SDBLKLEN 0x26
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#define REG_SDOPT 0x28
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#define REG_SDFIFO 0x30
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#define REG_DATACTL32 0x100
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#define REG_SDBLKLEN32 0x104
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#define REG_SDBLKCOUNT32 0x108
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#define REG_SDFIFO32 0x10C
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#define REG_SDDATACTL 0xd8
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#define REG_SDRESET 0xe0
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#define REG_SDPROTECTED 0xf6 //bit 0 determines if sd is protected or not?
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#define REG_CLK_AND_WAIT_CTL 0x138
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#define REG_RESET_SDIO 0x1e0
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#define REG_SDDATACTL32 0x100
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#define REG_SDBLKLEN32 0x104
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#define REG_SDBLKCOUNT32 0x108
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#define REG_SDFIFO32 0x10C
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#define REG_CLK_AND_WAIT_CTL 0x138
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#define REG_RESET_SDIO 0x1e0
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#define TMIO_STAT0_CMDRESPEND 0x0001
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#define TMIO_STAT0_DATAEND 0x0004
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@@ -97,88 +97,32 @@
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#define TMIO_MASK_ALL 0x837f031d
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#define TMIO_MASK_GW (TMIO_STAT1_ILL_ACCESS | TMIO_STAT1_CMDTIMEOUT | TMIO_STAT1_TXUNDERRUN | TMIO_STAT1_RXOVERFLOW | \
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TMIO_STAT1_DATATIMEOUT | TMIO_STAT1_STOPBIT_ERR | TMIO_STAT1_CRCFAIL | TMIO_STAT1_CMD_IDX_ERR)
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TMIO_STAT1_DATATIMEOUT | TMIO_STAT1_STOPBIT_ERR | TMIO_STAT1_CRCFAIL | TMIO_STAT1_CMD_IDX_ERR)
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#define TMIO_MASK_READOP (TMIO_STAT1_RXRDY | TMIO_STAT1_DATAEND)
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#define TMIO_MASK_WRITEOP (TMIO_STAT1_TXRQ | TMIO_STAT1_DATAEND)
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct mmcdevice {
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vu8* data;
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u32 size;
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u32 error;
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u16 stat0;
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u16 stat1;
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u32 ret[4];
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u32 initarg;
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u32 isSDHC;
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u32 clk;
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u32 SDOPT;
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u32 devicenumber;
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u32 total_size; //size in sectors of the device
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u32 res;
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} mmcdevice;
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typedef struct mmcdevice {
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uint8_t* data;
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uint32_t size;
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uint32_t error;
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uint16_t stat0;
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uint16_t stat1;
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uint32_t ret[4];
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uint32_t initarg;
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uint32_t isSDHC;
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uint32_t clk;
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uint32_t SDOPT;
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uint32_t devicenumber;
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uint32_t total_size; //size in sectors of the device
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uint32_t res;
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} mmcdevice;
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void sdmmc_sdcard_init();
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int sdmmc_sdcard_readsector(uint32_t sector_no, uint8_t *out);
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int sdmmc_sdcard_readsectors(uint32_t sector_no, uint32_t numsectors, uint8_t *out);
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int sdmmc_sdcard_writesector(uint32_t sector_no, uint8_t *in);
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int sdmmc_sdcard_writesectors(uint32_t sector_no, uint32_t numsectors, uint8_t *in);
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int sdmmc_nand_readsectors(uint32_t sector_no, uint32_t numsectors, uint8_t *out);
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int sdmmc_nand_writesectors(uint32_t sector_no, uint32_t numsectors, uint8_t *in);
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mmcdevice *getMMCDevice(int drive);
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void InitSD();
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int Nand_Init();
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int SD_Init();
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int sdmmc_sdcard_init();
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u32 sdmmc_sdcard_readsectors(u32 sector_no, u32 numsectors, vu8 *out);
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u32 sdmmc_sdcard_writesectors(u32 sector_no, u32 numsectors, vu8 *in);
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mmcdevice *getMMCDevice(int drive);
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#ifdef __cplusplus
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};
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#endif
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u32 sdmmc_nand_readsectors(u32 sector_no, u32 numsectors, vu8 *out);
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u32 sdmmc_nand_writesectors(u32 sector_no, u32 numsectors, vu8 *in);
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//---------------------------------------------------------------------------------
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static inline uint16_t sdmmc_read16(uint16_t reg) {
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//---------------------------------------------------------------------------------
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return *(volatile uint16_t*)(SDMMC_BASE + reg);
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}
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//---------------------------------------------------------------------------------
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static inline void sdmmc_write16(uint16_t reg, uint16_t val) {
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//---------------------------------------------------------------------------------
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*(volatile uint16_t*)(SDMMC_BASE + reg) = val;
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}
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//---------------------------------------------------------------------------------
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static inline uint32_t sdmmc_read32(uint16_t reg) {
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//---------------------------------------------------------------------------------
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return *(volatile uint32_t*)(SDMMC_BASE + reg);
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}
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//---------------------------------------------------------------------------------
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static inline void sdmmc_write32(uint16_t reg, uint32_t val) {
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//---------------------------------------------------------------------------------
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*(volatile uint32_t*)(SDMMC_BASE + reg) = val;
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}
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//---------------------------------------------------------------------------------
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static inline void sdmmc_mask16(uint16_t reg, const uint16_t clear, const uint16_t set) {
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//---------------------------------------------------------------------------------
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uint16_t val = sdmmc_read16(reg);
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val &= ~clear;
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val |= set;
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sdmmc_write16(reg, val);
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}
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static inline void setckl(uint32_t data)
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{
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sdmmc_mask16(REG_SDCLKCTL,0x100,0);
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sdmmc_mask16(REG_SDCLKCTL,0x2FF,data&0x2FF);
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sdmmc_mask16(REG_SDCLKCTL,0x0,0x100);
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}
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#endif
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