Fix patchSvcBreak11
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2ff4fc3cdd
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07bbff7d11
@ -190,7 +190,7 @@ u32 patchNativeFirm(u32 firmVersion, FirmwareSource nandType, u32 emuHeader, boo
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u32 codeSetOffset,
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stackAddress = getInfoForArm11ExceptionHandlers(arm11Section1, firm->section[1].size, &codeSetOffset);
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ret += installArm11Handlers(arm11ExceptionsPage, stackAddress, codeSetOffset, arm11DAbtHandler, baseK11VA + ((u8 *)arm11DAbtHandler - arm11Section1));
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patchSvcBreak11(arm11Section1, arm11SvcTable);
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patchSvcBreak11(arm11Section1, arm11SvcTable, baseK11VA);
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ret += patchKernel11Panic(arm11Section1, firm->section[1].size);
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//ARM9 exception handlers
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@ -404,10 +404,10 @@ u32 patchSvcBreak9(u8 *pos, u32 size, u32 kernel9Address)
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return 0;
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}
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void patchSvcBreak11(u8 *pos, u32 *arm11SvcTable)
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void patchSvcBreak11(u8 *pos, u32 *arm11SvcTable, u32 baseK11VA)
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{
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//Same as above, for NATIVE_FIRM ARM11
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u32 *addr = (u32 *)(pos + arm11SvcTable[0x3C] - 0xFFF00000);
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u32 *addr = (u32 *)(pos + arm11SvcTable[0x3C] - baseK11VA);
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*addr = 0xE12FFF7F;
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}
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@ -53,7 +53,7 @@ u32 implementSvcGetCFWInfo(u8 *pos, u32 *arm11SvcTable, u32 baseK11VA, u8 **free
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u32 patchArm9ExceptionHandlersInstall(u8 *pos, u32 size);
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u32 getInfoForArm11ExceptionHandlers(u8 *pos, u32 size, u32 *codeSetOffset);
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u32 patchSvcBreak9(u8 *pos, u32 size, u32 kernel9Address);
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void patchSvcBreak11(u8 *pos, u32 *arm11SvcTable);
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void patchSvcBreak11(u8 *pos, u32 *arm11SvcTable, u32 baseK11VA);
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u32 patchKernel9Panic(u8 *pos, u32 size);
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u32 patchKernel11Panic(u8 *pos, u32 size);
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u32 patchP9AccessChecks(u8 *pos, u32 size);
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