Add proper arm11 crt0 and fix race condition
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parent
d6c6c421e9
commit
067e217909
@ -8,7 +8,8 @@ SECTIONS
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.text : ALIGN(4) { *(.text.start) *(.text*); . = ALIGN(4); }
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.rodata : ALIGN(4) { *(.rodata*); . = ALIGN(4); }
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.data : ALIGN(4) { *(.data*); . = ALIGN(8); *(.bss* COMMON); . = ALIGN(8); }
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.data : ALIGN(4) { *(.data*); . = ALIGN(4); }
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.bss : ALIGN(8) { __bss_start = .; *(.bss* COMMON); . = ALIGN(8); __bss_end = .; }
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__stack_top__ = 0x1FFFF000;
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. = ALIGN(4);
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@ -194,9 +194,7 @@ void main(void)
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case PREPARE_ARM11_FOR_FIRMLAUNCH:
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memcpy((void *)0x1FFFFC00, (void *)prepareForFirmlaunch, prepareForFirmlaunchSize);
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*(vu32 *)0x1FFFFFFC = 0;
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operation = ARM11_READY;
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((void (*)(void))0x1FFFFC00)();
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break;
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((void (*)(u32, volatile Arm11Operation *))0x1FFFFC00)(ARM11_READY, &operation);
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}
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operation = ARM11_READY;
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@ -33,4 +33,20 @@ void memcpy(void *dest, const void *src, u32 size)
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for(u32 i = 0; i < size; i++)
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destc[i] = srcc[i];
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}
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}
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void memset(void *dest, u32 filler, u32 size)
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{
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u8 *destc = (u8 *)dest;
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for(u32 i = 0; i < size; i++)
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destc[i] = (u8)filler;
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}
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void memset32(void *dest, u32 filler, u32 size)
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{
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u32 *dest32 = (u32 *)dest;
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for(u32 i = 0; i < size / 4; i++)
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dest32[i] = filler;
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}
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@ -28,4 +28,6 @@
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#include "types.h"
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void memcpy(void *dest, const void *src, u32 size);
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void memcpy(void *dest, const void *src, u32 size);
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void memset(void *dest, u32 value, u32 size) __attribute__((used));
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void memset32(void *dest, u32 filler, u32 size);
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@ -31,12 +31,38 @@ operation:
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start:
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cpsid aif
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@ Set the control register to reset default: everything disabled
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ldr r0, =0x54078
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mcr p15, 0, r0, c1, c0, 0
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@ Set the auxiliary control register to reset default.
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@ Enables instruction folding, static branch prediction,
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@ dynamic branch prediction, and return stack.
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mov r0, #0xF
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mcr p15, 0, r0, c1, c0, 1
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@ Invalidate all caches, flush the prefetch buffer and DSB
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mov r0, #0
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mcr p15, 0, r0, c7, c5, 4
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mcr p15, 0, r0, c7, c5, 0
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mcr p15, 0, r0, c7, c6, 0
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mcr p15, 0, r0, c7, c10, 4
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@ Clear BSS
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ldr r0, =__bss_start
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mov r1, #0
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ldr r2, =__bss_end
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sub r2, r0
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bl memset32
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ldr sp, =__stack_top__
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b main
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.global prepareForFirmlaunch
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.type prepareForFirmlaunch, %function
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prepareForFirmlaunch:
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str r0, [r1] @ tell ARM9 we're done
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mov r0, #0x20000000
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_wait_for_core0_entrypoint_loop:
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